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L5973D 数据表(PDF) 8 Page - STMicroelectronics |
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L5973D 数据表(HTML) 8 Page - STMicroelectronics |
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8 / 21 page ![]() Functional description L5973AD 8/21 4.1 Power supply & voltage reference The internal regulator circuit (shown in Figure 3) consists of a start-up circuit, an internal voltage Preregulator, the Bandgap voltage reference and the Bias block that provides current to all the blocks. The Starter gives the start-up currents to the whole device when the input voltage goes high and the device is enabled (inhibit pin connected to ground). The Preregulator block supplies the Bandgap cell with a preregulated voltage VREG that has a very low supply voltage noise sensitivity. 4.2 Voltages monitor An internal block senses continuously the VCC, Vref and Vbg. If the voltages go higher than their thresholds, the regulator starts to work. There is also an hysteresis on the VCC (UVLO). Figure 3. Internal regulator circuit 4.3 Oscillator & synchronizator Figure 4 shows the block diagram of the oscillator circuit. The Clock Generator provides the switching frequency of the device that is internally fixed at 500KHz. The frequency shifter block acts reducing the switching frequency in case of strong overcurrent or short circuit. The clock signal is then used in the internal logic circuitry and is the input of the Ramp Generator and Synchronizator blocks. The Ramp Generator circuit provides the sawtooth signal, used to realize the PWM control and the internal voltage feed forward, while the Synchronizator circuit generates the synchronization signal. Infact the device has a synchronization pin that can works both as Master and Slave. As Master to synchronize external devices to the internal switching frequency. STARTER IC BIAS PREREGULATOR BANDGAP VREG VREF D00IN1126 VCC |
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