TS924_05 datasheet(5/14 Pages) STMICROELECTRONICS

5 / 14 page

TS924

Electrical Characteristics

5/14

Table 4.

VCC = +5V, VDD = 0V, Vicm = VCC/2, Tamb = 25°C, RL connected to VCC/2 (unless

otherwise specified)

Symbol

Parameter

Min.

Typ.

Max.

Unit

Vio

Input Offset Voltage - TS924

TS924A

Tmin. ≤ Tamb ≤ Tmax. - TS924

TS924A

0.9

1.8

DVio

Input Offset Voltage Drift

µV/°C

Iio

Input Offset Current

Vout = Vcc/2

Iib

Input Bias Current

Vout = Vcc/2

100

VOH

High Level Output Voltage

RL= 100k

RL = 600Ω

RL = 32Ω

4.90

4.85

4.4

VOL

Low Level Output Voltage

RL= 10k

RL = 600Ω

RL = 32Ω

300

120

Avd

Large Signal Voltage Gain (Vout = 2Vpk-pk)

RL= 10k

RL = 600Ω

RL = 32Ω

200

V/mV

Icc

Total Supply Current

no load, Vout = Vcc/2

4.5

GBP

Gain Bandwidth Product

RL = 600Ω

MHz

CMR

Common Mode Rejection Ratio

SVR

Supply Voltage Rejection Ratio

Vcc = 3V to 5V

Output Short Circuit Current

Slew Rate

0.7

1.3

µs

φm

Phase Margin at Unit Gain

RL = 600Ω, CL =100pF

Degrees

Gain Margin

RL = 600Ω, CL =100pF

Equivalent Input Noise Voltage

f = 1kHz

THD

Total Harmonic Distortion

Vout = 2Vpk-pk, F = 1kHz, Av = 1, RL =600Ω

0.005

Channel Separation

120

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