CS8240

http://onsemi.com

4

Figure 6. Flyback Clamp Characteristics

01

2

3

4

5

6

(ms)

78

5

0

12

–15

910

0

Load = 80

Ω, 50 mH

60

50

40

30

20

10

0

0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

2.0

Input Voltage (V)

ON

OFF

CIRCUIT DESCRIPTION

Input Stage

The input stage is a self biased band gap based circuit with

a positive going trip point of 1.45 V (typ) and a negative

going trip point of 1.20 V (typ) (250 mV of hysteresis).

When the input voltage is below the positive trip point, the

quiescent current of the supply voltage line is less than

1.0

µA, (typ). When the input voltage exceeds the positive

trip point (1.45 V, typ), the input stage “wakes up” the rest

of the CS8240 circuitry and turns on the output stage.

Output Stage

The output stage is built around a high current PNP output

transistor. A control amplifier monitors the saturation

voltage of the output PNP and maintains a balance of low

saturation voltage and minimum base drive to the PNP for

the given output current. The base drive of the PNP is the

dominant component of the quiescent current of the CS8240

and is dependent on the level of output current.

Short circuit protection (1.1 A, typ) is also incorporated in

the output stage.

Protection Circuitry

In addition to the short circuit protection mentioned

above, the CS8240 also incorporates a thermal shutdown

circuit (165

°C, typ) and a high voltage shutdown circuit

(33 V, typ), both of which cut off the drive to the PNP output

transistor when excessive current is drawn. Inherent in the

design of the CS8240 is transient protection to +60 V and

–50 V on the supply line. The CS8240 is ESD protected in

excess of 2.0 kV (Human Body Model).