MP8020 – IEEE 802.3af/at/bt, PoE, POWERED DEVICE INTERFACE

MP8020 Rev. 1.0

MonolithicPower.com

21

2/17/2022

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APPLICATION INFORMATION

Selecting a TVS Diode

To limit the input transient voltage within the

absolute maximum ratings, a TVS diode should

be placed across the rectified voltage (between

VDD and GND). For general indoor applications,

it is recommended to use an SMAJ58A diode,

or one with an equivalent protection voltage.

Outdoor

transient

levels

and

special

applications

typically

require

additional

protection.

Selecting an Input Capacitor

A 0.05μF to 0.12μF input bypass capacitor

must be placed from VDD to GND for IEEE

802.3bt standard specifications. A 0.1μF, 100V

ceramic capacitor is typically used.

Selecting the Classification Resistors (RCLSA

and RCLSB)

Connect a resistor from CLSA and CLSB to

GND to configure the classification current

according to the IEEE 802.3bt standard. The

assigned class power should correspond to the

maximum average power drawn by the PD

during operation. To select RCLSA and RCLSB,

see Table 1 on page 16.

Wall Power Adapter Detection Circuit

The MP8020 features wall power adapter

detection. Once VDD (between VADP and GND)

exceeds about 8.3V, the MP8020 enables wall

adapter detection. At this point, the resistor

divider from the VADP to AUX pin can configure

the threshold to switch from the PSE to an

adapter.

MP8020

VADP

AUX

From

Adapter

RADP1

RADP2

Figure 5: Wall Adapter Threshold Setting

PG Pin Setting

The PG pin is an active high, open-drain output

that requires an external pull-up resistor. The

PG pin’s maximum sink current should be

limited below 3mA. It is recommended to

connect a 20kΩ to 100kΩ pull-up resistor from

SRC to PG. Connect PG to the downstream

DC/DC converter’s EN pin to enable the DC/DC

converter.

PG goes to a high-impedance state if all of the

following conditions are met:

 The steady current limit changes, which

means the inrush period is complete.

 tDELAY of 90ms from UVLO is complete.

 The wall power adapter is detected on AUX,

and VADP exceeds the UVLO threshold.

BT, TYP1, and TYP2 Indicator Connection

The BT, TYP1, and TYP2 pins are open-drain

outputs that indicate the PSE type or the

presence of a wall adapter. Optocouplers can

interface these pins to circuitry on the

converter’s secondary side. Figure 6 shows the

optocoupler interface design for the BT, TYP1,

and TYP2 signals.

VDD

BT or TYP1 or TYP2

RBTT

VOUT

RBTT_OUT

VBTT_OUT

Figure 6: BT, TYP1, and TYP2 Interface

Where BT, TYP1, and TYP2 should have

maximum sink currents of 3mA, and RBTT

should exceed 20kΩ to match the maximum

57V input.

When

lighting

an

LED

from

VDD

to

BT/TYP1/TYP2 to indicate the PSE type, the

resistance can be higher to match the LED’s

maximum current and reduce power loss.

Configurable Current Limit

After VDD exceeds the UVLO threshold, the ILIM

pin sources a current that detects the

configurable current limit. By connecting ILIM to

GND via a resistor (or shorting ILIM to GND),

the MP8020’s current limit can be configured to

1.6A or 0.9A (see Table 2 on page 17).