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74ACT74 数据表(PDF) 2 Page - ON Semiconductor |
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74ACT74 数据表(HTML) 2 Page - ON Semiconductor |
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2 / 12 page ![]() MC74AC74, MC74ACT74 http://onsemi.com 2 TRUTH TABLE (Each Half) Inputs Outputs SD CD CP D Q Q L H X X H L H L X X L H L L X X H H H H H H L H H L L H H H L X Q0 Q0 NOTE: H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial; = LOW-to-HIGH Clock Transition Q0(Q0) = Previous Q(Q) before LOW-to-HIGH Transition of Clock Figure 2. Logic Symbol SD1 Q1 CP1 Q1 CD1 SD2 Q2 D2 CP2 Q2 CD2 D1 SD D CP CD Q Q Figure 3. Logic Diagram NOTE: This diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. MAXIMUM RATINGS Symbol Parameter Value Unit VCC DC Supply Voltage (Referenced to GND) −0.5 to +7.0 V Vin DC Input Voltage (Referenced to GND) −0.5 to VCC +0.5 V Vout DC Output Voltage (Referenced to GND) −0.5 to VCC +0.5 V Iin DC Input Current, per Pin ±20 mA Iout DC Output Sink/Source Current, per Pin ±50 mA ICC DC VCC or GND Current per Output Pin ±50 mA Tstg Storage Temperature −65 to +150 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. |
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