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UR5595-S08-R 数据表(PDF) 9 Page - Unisonic Technologies

部件名 UR5595-S08-R
功能描述  DDR TERMINATION REGULATOR
PDF  12 Pages
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制造商  UTC [Unisonic Technologies]
网页  http://www.utc-ic.com
标志 UTC - Unisonic Technologies

UR5595-S08-R 数据表(HTML) 9 Page - Unisonic Technologies

Back Button UR5595-S08-R Datasheet HTML 4Page - Unisonic Technologies UR5595-S08-R Datasheet HTML 5Page - Unisonic Technologies UR5595-S08-R Datasheet HTML 6Page - Unisonic Technologies UR5595-S08-R Datasheet HTML 7Page - Unisonic Technologies UR5595-S08-R Datasheet HTML 8Page - Unisonic Technologies UR5595-S08-R Datasheet HTML 9Page - Unisonic Technologies UR5595-S08-R Datasheet HTML 10Page - Unisonic Technologies UR5595-S08-R Datasheet HTML 11Page - Unisonic Technologies UR5595-S08-R Datasheet HTML 12Page - Unisonic Technologies  
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UR5595
MOS IC
UNISONICTECHNOLOGIESCO.,LTD
9 of 12
www.unisonic.com.tw
QW-R502-062,A
TYPICAL APPLICATION CIRCUITS(Cont.)
FOR DDR-II APPLICATIONS
As a result of the separate VDDQ pin and an internal resistor divider, UR5595 can be utilized in DDR-II system,
figure 5 and 6 show two recommended circuits in DDR-II SDRAM application. The output stage is connected to the
1.8V rail and the AVIN pin can be connected to either a 3.3V or 5V rail. If it is not desirable to use the 1.8V rail it is
possible to connect the output stage to a 3.3V rail. The power dissipation increasing concern must be careful as well
SSTL-II application. The advantage of configuration of figure 6 is that it has the ability to source and sink a higher
maximum continuous current.
+
+
+
VTT
VDDQ
VSENSE
VREF
GND
AVIN
PVIN
CIN
VDDQ=1.8V
AVIN=2.2V ~ 5.5V
COUT
CREF
VREF=0.9V
VTT=0.9V
UTC UR5595
PVIN=1.8V
Figure 5. Recommended DDR-II Termination
Figure 6. DDR-II Termination with higher voltage rails



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