STM32L010RB datasheet(21/89 Pages) STMICROELECTRONICS

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STM32L010RB

Functional overview

3.6

Low-power real-time clock and backup registers

The real time clock (RTC) and the 5 backup registers are supplied in all modes including

Standby mode. The backup registers are five 32-bit registers used to store 20 bytes of user

application data. They are not reset by a system reset, or when the device wakes up from

Standby mode.

The RTC is an independent BCD (binary-coded decimal) timer/counter. Its main features

are the following:

•

Calendar with subsecond, second, minute, hour (12 or 24 format), week, day, date,

month and year, in BCD format

•

Automatically correction for 28, 29 (leap year), 30, and 31 day of the month

•

Two programmable alarms with wakeup capability from Stop and Standby modes

•

Periodic wakeup from Stop and Standby modes, with programmable resolution and

period

•

On-the-fly correction from 1 to 32767 RTC clock pulses. This can be used to

synchronize with a master clock.

•

Reference clock detection: a more precise second-source clock (50 or 60 Hz) can be

used to enhance the calendar precision.

•

Digital calibration circuit with 1 ppm resolution, to compensate for quartz crystal

inaccuracy

•

Two anti-tamper detection pins with programmable filter. The MCU can be woken up

from Stop and Standby modes, on tamper event detection.

•

Timestamp feature that can be used to save the calendar content. This function can be

triggered by an event on the timestamp pin, or by a tamper event. The MCU can be

woken up from Stop and Standby modes on timestamp event detection.

The possible RTC clock sources are listed below:

•

a 32.768 kHz external crystal

•

a resonator or oscillator

•

the internal low-power RC oscillator (typical frequency of 37 kHz)

•

the high-speed external clock

3.7

General-purpose inputs/outputs (GPIOs)

Each of the GPIO pins can be configured by software as output (push-pull or open-drain), as

input (with or without pull-up or pull-down) or as peripheral alternate function. Most of the

GPIOs are shared with digital or analog alternate functions, and can be individually

remapped using dedicated alternate function registers. All GPIOs are high current capable.

Each GPIO output speed can be slowed (40 MHz, 10 MHz, 2 MHz, 400 kHz). The alternate

function configuration of I/Os can be locked if needed following a specific sequence in order

to avoid spurious writing to the I/O registers. The I/O controller is connected to a dedicated

I/O bus with a toggling speed of up to 32 MHz.

Extended interrupt/event controller (EXTI)

The extended interrupt/event controller consists of 23 edge detector lines used to generate

interrupt/event requests. Each line can be individually configured to select the trigger event

(rising edge, falling edge, both) and can be masked independently. A pending register

maintains the status of the interrupt requests. The EXTI detects an external line with a pulse

width shorter than the Internal APB2 clock period. 51 GPIOs can be connected to the 16

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