INTEGRATED CIRCUITS DIVISION

R07

www.ixysic.com

6

CPC1998J

4

Manufacturing Information

4.1 ESD Sensitivity

This product is ESD Sensitive, and should be handled according to the industry standard JESD-625.

4.2 Soldering Profile

For through-hole devices, the maximum and minimum peak solder temperature limits (Tp) and the device

maximum total dwell time through all solder waves is provided in the table below. Dwell time is the interval the

device pins are at or above the minimum peak solder temperature. Body temperature of the device must not

exceed the limit given in the table below at any time during the soldering process.

*Total cumulative duration of all waves.

NOTE: The exposed surface of the DCB substrate must not be soldered.

4.3 Board Wash

IXYS Integrated Circuits recommends the use of no-clean flux formulations. Board washing to reduce or remove flux

residue following the solder reflow process is acceptable provided proper precautions are taken to prevent damage to

the device. These precautions include but are not limited to: using a low pressure wash and providing a follow up bake

cycle sufficient to remove any moisture trapped within the device due to the washing process. Due to the variability of

the wash parameters used to clean the board, determination of the bake temperature and duration necessary to

remove the moisture trapped within the package is the responsibility of the user (assembler). Cleaning or drying

methods that employ ultrasonic energy may damage the device and should not be used. Additionally, the device must

not be exposed to halide flux or solvents.

Device

Solder Temperature (Tp)

Body Temperature

Dwell Time

Wave Cycles

Minimum

Maximum

CPC1998J

235°C

260°C

245°C

10 seconds*

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