WM8772SEDSSLASHRV datasheet(27/73 Pages) WOLFSON

部件名	WM8772SEDS/RV

功能描述	24-bit, 192kHz 6-Channel Codec with Volume Control

PDF	73 Pages

Scroll/Zoom	100%

制造商	WOLFSON [Wolfson Microelectronics plc]

网页	http://www.wolfsonmicro.com

标志

27 / 73 page

Production Data

WM8772EDS – 28 LEAD SSOP

PD Rev 4.2 October 2005

ADCLRC

ADCBCLK

DOUT

Input Word Length (IWL)

1/fs

LEFT CHANNEL

n-1

LSB

MSB

n-1

RIGHT CHANNEL

NO VALID DATA

1 BCLK

Figure 29 DSP Mode Audio Interface - Mode A Master, ADC

DSP MODE B

In DSP mode B, the MSB of DAC channel 1 left data is sampled by the WM8772EDS on the first

BCLK rising edge following a LRC rising edge. DAC channel 1 right and DAC channels 2 and 3 data

follow DAC channel 1 left data (Figure 30).

Figure 30 DSP Mode Audio Interface - Mode B Slave, DAC

DACLRC

DACBCLK

DIN1

Input Word Length (IWL)

1/fs

CHANNEL 1

LEFT

n-1

LSB

MSB

n-1

CHANNEL 1

RIGHT

CHANNEL 2

LEFT

n-1

CHANNEL 3

RIGHT

NO VALID DATA

Figure 31 DSP Mode Audio Interface - Mode B Master, DAC

The MSB of the left channel ADC data is output on DOUT and changes on the same falling edge of

BCLK as the low to high LRC transition and may be sampled on the rising edge of BCLK. The right

channel ADC data is contiguous with the left channel data (Figure 32).

WM8772SEDS/RV 数据表(PDF) 27 Page - Wolfson Microelectronics plc

WM8772SEDS/RV 数据表(HTML) 27 Page - Wolfson Microelectronics plc

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