3

ATmega8515(L)

2512JS–AVR–10/06

Overview

The ATmega8515 is a low-power CMOS 8-bit microcontroller based on the AVR

enhanced RISC architecture. By executing powerful instructions in a single clock cycle,

the ATmega8515 achieves throughputs approaching 1 MIPS per MHz allowing the sys-

tem designer to optimize power consumption versus processing speed.

Block Diagram

Figure 2. Block Diagram

INTERNAL

OSCILLATOR

WATCHDOG

TIMER

MCU CTRL.

& TIMING

OSCILLATOR

TIMERS/

COUNTERS

INTERRUPT

UNIT

STACK

POINTER

EEPROM

SRAM

STATUS

REGISTER

USART

PROGRAM

COUNTER

PROGRAM

FLASH

INSTRUCTION

REGISTER

INSTRUCTION

DECODER

PROGRAMMING

LOGIC

SPI

COMP.

INTERFACE

PORTA DRIVERS/BUFFERS

PORTA DIGITAL INTERFACE

GENERAL

PURPOSE

REGISTERS

X

Y

Z

ALU

+

-

PORTC DRIVERS/BUFFERS

PORTC DIGITAL INTERFACE

PORTB DIGITAL INTERFACE

PORTB DRIVERS/BUFFERS

PORTD DIGITAL INTERFACE

PORTD DRIVERS/BUFFERS

XTAL1

XTAL2

RESET

CONTROL

LINES

VCC

GND

PA0 - PA7

PC0 - PC7

PD0 - PD7

PB0 - PB7

AVR CPU

INTERNAL

CALIBRATED

OSCILLATOR

PORTE

DRIVERS/

BUFFERS

PORTE

DIGITAL

INTERFACE

PE0 - PE2