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AMC131M02DFMR 数据表(PDF) 21 Page - Texas Instruments

部件名 AMC131M02DFMR
功能描述  AMC131M02 2-Channel, 64-kSPS, Simultaneous-Sampling, 24-Bit, Reinforced Isolated Delta-Sigma ADC With Integrated DC/DC Converter
PDF  89 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

AMC131M02DFMR 数据表(HTML) 21 Page - Texas Instruments

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The input impedance of the PGA dominates the input impedance characteristics of the AMC131M02. The
PGA input impedance for gain settings up to 4 behaves according to Equation 4 without accounting for
device tolerance and change over temperature. Minimize the output impedance of the circuit that drives the
AMC131M02 inputs to obtain the best possible gain error, INL, and distortion performance.
275 kΩ × 4.096 MHz / fMOD
(4)
where:
• fMOD is the ΔΣ modulator frequency, fCLKIN / NDIV
By default, NDIV = 2. NDIV is set by the programmable clock divider, see the Clocking and Power Modes section.
The device uses an input precharge buffer for PGA gain settings of 8 and higher. The input impedance at these
gain settings is very high. Specifying the input bias current for these gain settings is therefore more useful.
8.3.7 Voltage Reference
The AMC131M02 uses an internally generated, low-drift, band-gap voltage to supply the reference for the ADC.
The reference has a nominal voltage of 1.2 V, allowing the differential input voltage to swing from –1.2 V to 1.2 V.
The reference circuitry starts up very quickly to accommodate the fast start-up feature of this device. The device
waits until the reference circuitry is fully settled before generating conversion data.
8.3.8 Internal Test Signals
The AMC131M02 features an internal analog test signal that is useful for troubleshooting and diagnosis. A
positive or negative DC test signal can be applied to the channel inputs through the input multiplexer. The
multiplexer is controlled through the MUXn[1:0] bits in the CHn_CFG register. The test signals are created by
internally dividing the reference voltage. The same signal is shared by all channels.
The test signal is nominally 2 / 15 × VREF. The test signal automatically adjusts the voltage level with the gain
setting such that the ADC always measures a signal that is 2 / 15 × VDiff Max. For example, at a gain of 1, this
voltage equates to 160 mV. At a gain of 2, this voltage is 80 mV.
www.ti.com
AMC131M02
SBASA56 – SEPTEMBER 2023
Copyright © 2023 Texas Instruments Incorporated
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