AD8628/AD8629/AD8630

Rev. E | Page 17 of 24

TIME (500

μs/DIV)

0V

0V

CH1 = 50mV/DIV

CH2 = 1V/DIV

INPUT OVERVOLTAGE PROTECTION

Although the AD8628/AD8629/AD8630 are rail-to-rail input

amplifiers, care should be taken to ensure that the potential

difference between the inputs does not exceed the supply volt-

age. Under normal negative feedback operating conditions, the

amplifier corrects its output to ensure that the two inputs are at

the same voltage. However, if either input exceeds either supply

rail by more than 0.3 V, large currents begin to flow through the

ESD protection diodes in the amplifier.

These diodes are connected between the inputs and each supply

rail to protect the input transistors against an electrostatic dis-

charge event, and they are normally reverse-biased. However, if

the input voltage exceeds the supply voltage, these ESD diodes

can become forward-biased. Without current limiting, excessive

amounts of current could flow through these diodes, causing

permanent damage to the device. If inputs are subject to over-

voltage, appropriate series resistors should be inserted to limit

the diode current to less than 5 mA maximum.

Figure 58. Positive Input Overload Recovery for the AD8628

TIME (500

μs/DIV)

0V

0V

CH1 = 50mV/DIV

CH2 = 1V/DIV

OUTPUT PHASE REVERSAL

Output phase reversal occurs in some amplifiers when the input

common-mode voltage range is exceeded. As common-mode

voltage is moved outside of the common-mode range, the

outputs of these amplifiers can suddenly jump in the opposite

direction to the supply rail. This is the result of the differential

input pair shutting down, causing a radical shifting of internal

voltages that results in the erratic output behavior.

The AD8628/AD8629/AD8630 amplifiers have been carefully

designed to prevent any output phase reversal, provided that

both inputs are maintained within the supply voltages. If one or

both inputs could exceed either supply voltage, a resistor should

be placed in series with the input to limit the current to less

than 5 mA. This ensures that the output does not reverse its

phase.

Figure 59. Positive Input Overload Recovery for LTC2050

TIME (500

μs/DIV)

0V

0V

CH1 = 50mV/DIV

CH2 = 1V/DIV

OVERLOAD RECOVERY TIME

Many auto-zero amplifiers are plagued by a long overload

recovery time, often in ms, due to the complicated settling

behavior of the internal nulling loops after saturation of the

outputs. The AD8628/AD8629/AD8630 have been designed so

that internal settling occurs within two clock cycles after output

saturation happens. This results in a much shorter recovery

time, less than 10 μs, when compared to other auto-zero

amplifiers. The wide bandwidth of the AD8628/AD8629/

AD8630 enhances performance when the parts are used to

drive loads that inject transients into the outputs. This is a

common situation when an amplifier is used to drive the input

of switched capacitor ADCs.

Figure 60. Positive Input Overload Recovery for LMC2001