AD1994

Rev. 0 | Page 17 of 24

Setting the Modulator Gain

Programmable Gain Amplifier (PGA)

The Σ-Δ modulator itself requires a fixed gain for a given value

of PV

The AD1994 modulator uses a combination of the input signal

and feedback from the power output stage to calculate its two-

state output pattern. The feedback input nodes are part of the

internal analog circuit that operates from the AV

DD

to maintain optimal stability. This gain can be appropriate,

but many applications require more gain to account for low

source signal levels. The AD1994 includes a programmable gain

amplifier (PGA) to boost the overall amplifier gain. PGA1 (Pin

31) and PGA0 (Pin 32) select one of four PGA gain values, as

shown in

DD

(nominal

5 V) power supply. Because the voltage measured at the power

the 0 V to AV

Table 11.

DD

range, a voltage divider is required to scale the

feedback to an appropriate level.

Table 11. PGA Gain Settings

Resistor voltage dividers should sense the voltage on each side

of the differential output and provide these feedback signals to

the modulator, as shown in

PGA1

PGA0

PGA Gain (dB)

0

0

0

Figure 45.

EXTERNAL COMPONENTS

R1

R3

CC

LL

D2

D4

D1

D3

OUTx+

OUTx–

R2

R4

NFx+

NFx–

PGND

PGND

Figure 45. H-Bridge Configuration

The resistor values should satisfy the following equation to

maintain modulator stability.

635

.

3

4

4

3

2

2

1

DD

PV

R

R

R

R

R

R

Gain

=

+

=

+

=

Selecting a gain that meets this criterion ensures that the

modulator remains in a stable operating condition.

The ratio of the resistances sets the gain rather than the absolute

values. However, the dividers provide a path from the high

voltage supply to ground; therefore, the values should be large

enough to produce negligible loss due to quiescent current.

The chip contains a calibration circuit to minimize voltage

offsets at the speaker, which helps to minimize clicks and pops

when muting or unmuting. Optimal performance is achieved

for the offset calibration circuit when the feedback divider resistors

sum to 6 kΩ, that is, (R1 + R2) = 6 kΩ, and (R3 + R4) = 6 kΩ.

Table 10. Recommended Feedback Resistor Values

R1 (kΩ)

R2 (kΩ)

Gain

12

4.2

1.8

3.3 (+10.4 dB)

15

4.55

1.45

4.1 (+12.3 dB)

18

4.8

1.2

5.0 (+14.0 dB)

20

4.91

1.09

5.5 (+14.8 dB)

0

1

6

1

0

12

1

1

18

The AD1994 incorporates a single-ended-to-differential

converter for each channel in the analog front-end section.

The PGA is also part of this analog front-end, and it affects the

analog input signal before it enters the Σ-Δ modulator. The

PGA1 and PGA0 pins are continuously monitored and allow

the gain to be changed at any time.

POWER STAGE

The H-Bridge

The output stage of the AD1994 includes four integrated

MOSFET devices arranged in a full H-bridge, as shown in

Figure 45. The P-Type, high-side transistor of one leg and the

N-Type, low-side transistor of the opposite leg switch on and off

as a pair producing a total voltage swing across the load of

important that neither output terminal be shorted to ground.

should be in the 8 V to 20 V range and should be capable of

supplying enough current to drive the load. Connect the power

supply across the PVDD and PGND pins. The feedback pins,

NFR+, NFR−, NFL+, and NFL−, supply negative feedback to

the modulator as described in the Setting the Modulator Gain

section.