A8091/AD8092

Rev. B | Page 8 of 20

more metal directly in contact with the package leads from

metal traces, through holes, ground, and power planes reduces

at the input leads of high speed op amps as discussed in the

board layout section.

Figure 4 shows the maximum safe power dissipation in the

package vs. the ambient temperature for the SOIC-8

(125°C/W), SOT23-5 (180°C/W), and MSOP-8 (150°C/W) on a

JEDEC standard four-layer board.

2.0

0

0.5

1.0

1.5

–40 –30 –20 –10

0

102030

405060

708090

AMBIENT TEMPERATURE (

°C)

MSOP-8

SOIC-8

SOT23-5

Figure 4. Maximum Power Dissipation vs.

Temperature for a Four-Layer Board