AD8129ARMZ datasheet(35/40 Pages) AD

35 / 40 page

AD8129/AD8130

Rev. C | Page 35 of 40

One way to accomplish this is to drive both REF and RG with

the desired offset signal (see Figure 139). Superposition can be

used to solve this circuit. First, break the connection between

VOFFSET and RG. With RG grounded, the gain from Pin 4 to VOUT

is 1 + RF/RG. With Pin 4 grounded, the gain though RG to VOUT

is −RF/RG. The sum of these is 1. If VREF is delivered from a low

impedance source, this works fine. However, if the delivered

offset voltage is derived from a high impedance source, such as

a voltage divider, its impedance affects the gain equation. This

makes the circuit more complicated because it creates an

interaction between the gain and offset voltage.

VOUT =

VIN × (1 + RF/RG)+VOFFSET

–V

VIN

VOFFSET

–VS

+VS

AD8129/

AD8130

0.1

μF

0.1

μF

Figure 139. In this Circuit, VOFFSET Appears at the Output with Unity Gain. This

Circuit Works Well if the VOFFSET Source Impedance Is Low.

A way around this is to apply the offset voltage to a voltage

divider whose attenuation factor matches the gain of the

amplifier and then apply this voltage to the high impedance

REF input. This circuit first divides the desired offset voltage

by the gain, and the amplifier multiplies it back up to unity (see

Figure 140).

VOUT =

VIN × (1 + RF/RG)+VOFFSET

–V

VIN

–VS

+VS

VOFFSET

AD8129/

AD8130

0.1

μF

0.1

μF

Figure 140. Adding an Attenuator at the Offset Input Causes It to Appear at

the Output with Unity Gain.

RESISTORLESS GAIN OF 2

The voltage applied to the REF input (Pin 4) can also be a high

bandwidth signal. If a unity-gain AD8130 has both +IN and

REF driven with the same signal, there is unity gain from VIN

and unity gain from VREF. Thus, the circuit has a gain of 2 and

requires no resistors (see Figure 141).

VOUT

–V

VIN

–VS

+VS

AD8130

0.1

μF

0.1

μF10μF

Figure 141. Gain-of-2 Connections with No Resistors

SUMMER

A general summing circuit can be made by the previous

technique. A unity-gain configured AD8130 has one signal

applied to +IN, while the other signal is applied to REF. The

output is the sum of the two input signals (see Figure 142).

VOUT = V1 + V2

–V

–VS

+VS

AD8130

0.1

μF

0.1

μF10μF

Figure 142. A Summing Circuit that is Noninverting

with High Input Impedance

This circuit offers several advantages over a conventional op

amp inverting summing circuit. First, the inputs are both high

impedance and the circuit is noninverting. It would require

significant additional circuitry to make an op amp summing

circuit that has high input impedance and is noninverting.

Another advantage is that the AD8130 circuit still preserves the

full bandwidth of the part. In a conventional summing circuit,

the noise gain is increased for each additional input, so the

bandwidth response decreases accordingly. By this technique,

four signals can be summed by applying them to two AD8130s

and then summing the two outputs by a third AD8130.

CABLE-TAP AMPLIFIER

It is often desirable to have a video signal drive several pieces of

equipment. However, the cable should only be terminated once at

its endpoint; therefore, it is not appropriate to have a termination

at each device. A loop-through connection allows a device to tap

the video signal while not disturbing it by any excessive loading.

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