AD8314

Rev. B | Page 16 of 20

MOBILE HANDSET POWER CONTROL EXAMPLES

Figure 39 shows a complete power amplifier control circuit for a

dual mode handset. This circuit is applicable to any dual mode

handset using TDMA or CDMA technologies. The PF08107B

(Hitachi) is driven by a nominal power level of 3 dBm. Some of

the output power from the PA is coupled off using an

LDC15D190A0007A (Murata) directional coupler. This has a

coupling factor of approximately 19 dB for its lower frequency

band (897.5 MHz ± 17.5 MHz) and 14 dB for its upper band

(1747.5 MHz ± 37.5 MHz) and an insertion loss of 0.38 dB

and 0.45 dB, respectively. Because the PF08107B transmits a

maximum power level of 35 dBm, additional attenuation of

15 dB is required before the coupled signal is applied to

the AD8314.

2.7V

VSET

0V TO 1.1V

PF08107B

(HITACHI)

PIN BAND 1

3dBm

PIN BAND 2

3dBm

1000pF

0dBm

MAX

ATTN

15dB

220pF

POUT BAND 2

32dBm MAX

POUT BAND 1

35dBm MAX

TO

ANTENNA

7

8

5

1

4

3

26

LDC15D190A0007A

BAND

SELECT

0V/2V

3.5V

52.3Ω

49.9Ω

1

2

3

4

ENBL

RFIN

AD8314

8

7

6

5

VSET

FLTR

V_DN

VPOS

COMM

V_UP

0.1µF

4.7µF

Figure 39. A Dual Mode Power Amplifier Control Circuit

The setpoint voltage, in the 0 V to 1.1 V range, is applied to the

VSET pin of the AD8314. This is typically supplied by a DAC.

This voltage is compared to the input level of the AD8314. Any

imbalance between VSET and the RF input level is corrected by

amplifier. V_DN reaches a maximum value of approximately

1.9 V on a 2.7 V supply (this is higher for higher supply

dynamics of the power amplifier, something that is frequently

characterized poorly, so some trial and error can be necessary.

In this example, a 220 pF capacitor gives the loop sufficient

speed to follow the GSM and DCS1800 time slot ramping

profiles, while still having a stable, critically damped response.