AD8315

Rev. C | Page 21 of 24

Figure 44. Layout of Component Side (MSOP)

EVALUATION BOARD REV A

PWUP GND

TP2

AD8315

VAPC

J2

VPOS

TP1

R3

C1

R2

R1

C4

Z1

R8

LK2

PWDN

A

B

SW1

RFIN

J1

J3

C3

R6

A1

LK1

VSET

08 - 006794 REV A

COMPONENT SIDE

Figure 45. Silkscreen of Component Side (MSOP)

For operation in controller mode, both jumpers, LK1 and LK2,

should be removed. The setpoint voltage is applied to VSET,

RFIN is connected to the RF source (PA output or directional

coupler), and VAPC is connected to the gain control pin of the

PA. When used in controller mode, a capacitor must be installed in

C4 for loop stability. For GSM/DCS handset power amplifiers,

this capacitor should typically range from 150 pF to 300 pF.

A quasimeasurement mode (where the AD8315 delivers an

output voltage that is proportional to the log of the input signal)

can be implemented, to establish the relationship between VSET

and RFIN, by installing the two jumpers, LK1 and LK2. This

mimics an AGC loop. To establish the transfer function of the

log amp, the RF input should be swept while the voltage on

VSET is measured, that is, the SMA connector labeled VSET

now acts as an output. This is the simplest method to validate

operation of the evaluation board. When operated in this mode,

a large capacitor (0.01 μF or greater) must be installed in C4

(filter capacitor) to ensure loop stability.