21

1921C–MICRO–3/05

AT89C55WD

Chip Erase Sequence: Before the AT89C55WD can be reprogrammed, a Chip Erase operation

needs to be performed. To erase the contents of the AT89C55WD, follow this sequence:

1.

Raise V

2.

Pulse ALE/PROG once (duration of 200 - 500 ns).

3.

Wait for 150 ms.

4.

Power V

5.

Pulse ALE/PROG once (duration of 200 - 500 ns).

6.

Wait for 150 ms.

7.

Power V

Data Polling: The AT89C55WD features Data Polling to indicate the end of a write cycle. During

a write cycle, an attempted read of the last byte written will result in the complement of the writ-

ten data on P0.7. Once the write cycle has been completed, true data is valid on all outputs, and

the next cycle may begin. Data Polling may begin any time after a write cycle has been initiated.

Ready/Busy: The progress of byte programming can also be monitored by the RDY/BSY output

signal. P3.0 is pulled low after ALE goes high during programming to indicate BUSY. P3.0 is

pulled high again when programming is done to indicate READY.

Program Verify: If lock bits LB1 and LB2 have not been programmed, the programmed code

data can be read back via the address and data lines for verification. The status of the individual

lock bits can be directly verified by reading them back.

Reading the Signature Bytes: The signature bytes are read by the same procedure as a nor-

mal verification of locations 000H, 100H, and 200H, except that P3.6 and P3.7 must be pulled to

a logic low. The values returned are as follows:

(000H) = 1EH indicates manufactured by Atmel

(100H) = 55H

(200H) = 06H indicates 89C55WD

21. Programming Interface

Every code byte in the Flash array can be programmed by using the appropriate combination of

control signals. The write operation cycle is self-timed and once initiated, will automatically time

itself to completion.

Most major worldwide programming vendors offer support for the Atmel AT89 microcontroller

series. Please contact your local programming vendor for the appropriate software revision.