2

3443C–DFLSH–5/05

AT45DB041B

When the device is shipped from Atmel, the most significant page of the memory array may not

be erased. In other words, the contents of the last page may not be filled with FFH.

2.

Pin Configurations and Packages

Table 2-1.

Pin Configurations

Pin Name

Function

CS

Chip Select

SCK

Serial Clock

SI

Serial Input

SO

Serial Output

WP

Hardware Page Write Protect Pin

RESET

Chip Reset

RDY/BUSY

Ready/Busy

Figure 2-1.

TSOP Top View Type 1

Figure 2-2.

CASON – Top View through Package

Figure 2-3.

8-SOIC

Figure 2-4.

28-SOIC

(1)

Note:

1. The next generation DataFlash devices will not be

offered in 28-SOIC package, therefore, this pack-

age is not recommended for new designs.

Figure 2-5.

CBGA Top View

through Package

1

2

3

4

5

6

7

8

9

10

11

12

13

14

28

27

26

25

24

23

22

21

20

19

18

17

16

15

RDY/BUSY

RESET

WP

NC

NC

VCC

GND

NC

NC

NC

CS

SCK

SI

SO

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

SI

SCK

RESET

CS

SO

GND

VCC

WP

8

7

6

5

1

2

3

4

1

2

3

4

8

7

6

5

SI

SCK

RESET

CS

SO

GND

VCC

WP

1

2

3

4

5

6

7

8

9

10

11

12

13

14

28

27

26

25

24

23

22

21

20

19

18

17

16

15

GND

NC

NC

CS

SCK

SI

SO

NC

NC

NC

NC

NC

NC

NC

VCC

NC

NC

WP

RESET

RDY/BUSY

NC

NC

NC

NC

NC

NC

NC

NC

A

B

C

D

E

12

3

NC

VCC

WP

RESET

NC

NC

GND

RDY/BSY

SI

NC

SCK

CS

SO

NC