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AT89C5132-ROTUL 数据表(PDF) 27 Page - ATMEL Corporation |
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AT89C5132-ROTUL 数据表(HTML) 27 Page - ATMEL Corporation |
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27 / 181 page ![]() 27 4173D–USB–02/06 AT89C5132 8.4 Registers Table 13. PSW Register PSW (S:8Eh) – Program Status Word Register Reset Value = 0000 0000b Table 14. AUXR Register AUXR (S:8Eh) – Auxiliary Control Register 765 4321 0 CY AC F0 RS1 RS0 OV F1 P Bit Number Bit Mnemonic Description 7CY Carry Flag Carry out from bit 1 of ALU operands. 6AC Auxiliary Carry Flag Carry out from bit 1 of addition operands. 5F0 User Definable Flag 0. 4 - 3 RS1:0 Register Bank Select Bits Refer to Table 10 for Bits description. 2OV Overflow Flag Overflow set by arithmetic operations. 1F1 User Definable Flag 1 0P Parity Bit Set when ACC contains an odd number of 1’s. Cleared when ACC contains an even number of 1’s. 765 4321 0 - EXT16 M0 DPHDIS XRS1 XRS0 EXTRAM AO Bit Number Bit Mnemonic Description 7- Reserved The values read from this bit is indeterminate. Do not set this bit. 6 EXT16 External 16-bit Access Enable Bit Set to enable 16-bit access mode during MOVX instructions. Clear to disable 16-bit access mode and enable standard 8-bit access mode during MOVX instructions. 5M0 External Memory Access Stretch Bit Set to stretch RD or WR signals duration to 15 CPU clock periods. Clear not to stretch RD or WR signals and set duration to 3 CPU clock periods. 4DPHDIS DPH Disable Bit Set to disable DPH output on P2 when executing MOVX @DPTR instruction. Clear to enable DPH output on P2 when executing MOVX @DPTR instruction. 3 - 2 XRS1:0 Expanded RAM Size Bits Refer to Table 11 for ERAM size description. |
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