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AT89C51CC03U-RDTIM 数据表(PDF) 100 Page - ATMEL Corporation |
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AT89C51CC03U-RDTIM 数据表(HTML) 100 Page - ATMEL Corporation |
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100 / 197 page  100 AT89C51CC03 4182K–CAN–05/06 Acceptance Filter Upon a reception hit (i.e., a good comparison between the ID+RTR+RB+IDE received and an ID+RTR+RB+IDE specified while taking the comparison mask into account) the ID+RTR+RB+IDE received are written over the ID TAG Registers. ID => IDT0-29 RTR => RTRTAG RB => RB0-1TAG IDE => IDE in CANCONCH register Figure 54. Acceptance filter block diagram example: To accept only ID = 318h in part A. ID MSK = 111 1111 1111 b ID TAG = 011 0001 1000 b 13/32 = 13/32 RxDC 13/32 Write 13/32 1 Hit 13/32 ID MSK Registers (Ch i) ID and RB RTR IDE Rx Shift Register (internal) ID and RB RTR IDE Enable (Ch i) ID TAG Registers (Ch i) and CanConch ID and RB RTR IDE CAN SFRs |
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