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CD3207 数据表(PDF) 8 Page - NXP Semiconductors

部件名 CD3207
功能描述  7-bit Futurebus transceiver
PDF  14 Pages
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制造商  PHILIPS [NXP Semiconductors]
网页  http://www.nxp.com
标志 PHILIPS - NXP Semiconductors

CD3207 数据表(HTML) 8 Page - NXP Semiconductors

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Philips Semiconductors
Product specification
FB2041
7-bit Futurebus+ transceiver
1995 May 25
8
AC ELECTRICAL CHARACTERISTICS (Commercial)
A PORT LIMITS
SYMBOL
PARAMETER
TEST
CONDITION
Tamb = +25°C, VCC = 5V,
CL = 50pF, RL = 500Ω
Tamb = 0 to 70°C,
VCC = 5V±10%,
CL = 50pF, RL = 500Ω
UNIT
MIN
TYP
MAX
MIN
MAX
tPLH
tPHL
Propagation delay,
Bn to AOn
Waveform 1, 2
1.8
1.6
3.4
3.2
5.0
4.9
1.6
1.6
5.5
5.0
ns
tPZH
tPZL
Output enable time,
OEA to AOn
Waveform 4, 5
2.2
2.0
5.0
4.0
6.5
6.5
2.0
1.8
10.0
8.0
ns
tPHZ
tPLZ
Output disable time,
OEA to AOn
Waveform 4, 5
1.5
1.8
3.3
3.0
4.8
5.0
1.2
1.5
5.0
5.5
ns
tTLH
tTHL
Transition time, AOn Port
(10% to 90% or 90% to 10%)
Test Circuit and
Waveforms
1.5
1.5
2.2
2.4
3.0
3.0
1.5
1.5
3.5
3.5
ns
tSK(o)
Output skew between receivers
in same package1
Waveform 3
0.4
1.0
1.0
ns
B PORT LIMITS
SYMBOL
PARAMETER
TEST CONDITION
Tamb = +25°C, VCC = 5V,
CD = 30pF, RU = 9Ω
Tamb = 0 to 70°C,
VCC = 5V±10%,
CD = 30pF, RU = 9Ω
UNIT
tPLH
tPHL
Propagation delay,
AIn to Bn
Waveform 1, 2
2.4
1.5
3.7
2.7
4.9
4.4
1.9
1.5
5.7
5.0
ns
tPLH
tPHL
Enable/disable time,
OEB0 to Bn
Waveform 2
2.4
1.9
3.7
3.5
4.9
4.9
1.9
1.8
6.4
5.4
ns
tPLH
tPHL
Enable/disable time,
OEB1 to Bn
Waveform 1
2.4
1.9
4.0
3.6
5.5
5.5
1.9
2.5
5.9
5.9
ns
tTLH
tTHL
Transition time, Bn Port
(1.3V to 1.8V)
Test Circuit and
Waveforms
1.0
0.5
1.4
1.1
3.0
3.0
1.0
0.5
3.0
3.0
ns
tSK(o)
Output skew between drivers in
same package1
Waveform 3
0.3
1.0
1.0
ns
SYMBOL
PARAMETER
TEST CONDITION
RU = 16.5Ω
RU = 16.5Ω
UNIT
tPLH
tPHL
Propagation delay,
AIn to Bn
Waveform 1, 2
2.5
1.6
3.8
2.8
5.0
4.5
2.0
1.6
5.8
5.1
ns
tPLH
tPHL
Enable/disable time,
OEB0 to Bn
Waveform 2
2.5
2.0
3.8
3.6
5.0
5.0
2.0
1.9
6.5
5.5
ns
tPLH
tPHL
Enable/disable time,
OEB1 to Bn
Waveform 1
2.5
2.0
4.1
3.7
5.6
5.6
2.0
2.6
6.0
6.0
ns
tTLH
tTHL
Transition time, Bn Port
(1.3V to 1.8V)
Test Circuit and
Waveforms
1.0
0.5
1.5
1.1
3.0
3.0
1.0
0.5
3.0
3.0
ns
tSK(o)
Output skew between drivers in
same package1
Waveform 3
0.3
1.0
1.0
ns
NOTES:
1.
 tPNactual – tPMactual for any data input to output path compared to any other data input to output path where N and M are either LH or
HL. Skew times are valid only under same test conditions (temperature, VCC, loading, etc.).



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