CDP68HC68T1EZ datasheet(21/24 Pages) INTERSIL

部件名	CDP68HC68T1EZ

功能描述	CMOS Serial Real-Time Clock With RAM and Power Sense/Control

PDF	24 Pages

Scroll/Zoom	100%

制造商	INTERSIL [Intersil Corporation]

网页	http://www.intersil.com/cda/home

标志

21 / 24 page

FN1547.7

March 17, 2006

Example of an automotive system. The VSYS and LINE inputs can be used to sense the ignition turning on and off. An

external switch is included to activate the system without turning on the ignition. Also, the CMOS CPU is not powered down

with the system VDD, but is held in a low power reset mode during power down. When restoring power the CDP68HC68T1

will enable the CLK OUT pin and set the PSE and CPUR high.

Important Application Note: Those units with a code of 6PG have delayed alarm interrupts of 8.3ms regardless of

CDP68HC68T1’s operating frequency. (See Pin Functions, INT.) In addition, reading the Status Register before delayed

alarm activates will disable alarm signal.

FIGURE 19. AUTOMOTIVE SYSTEM DIAGRAM

System Diagrams (Continued)

XTAL

LINE

VDD

VSYS

VBATT

POR

2MHz

PSE

CPUR

CLK OUT

SPI

INT

VSS

VDD

RESET

OSC1

IRQ

SPI

PORT

CDP68HC05C4B

VSS

PORT

REG

12V

IGNITION

CLOCK BUTTON

ENABLED POWER

CDP68HC68T1EZ 数据表(PDF) 21 Page - Intersil Corporation

CDP68HC68T1EZ 数据表(HTML) 21 Page - Intersil Corporation

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