CDP68HC68T1M2 datasheet(3/24 Pages) INTERSIL

3 / 24 page

FN1547.7

March 17, 2006

Absolute Maximum Ratings

Thermal Information

Supply Voltage, VDD . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.5V to +7V

Input Voltage, VIN . . . . . . . . . . . . . . . . . . . VSS -0.3V to VDD +0.3V

Current Drain Per Input Pin Excluding VDD and VSS, I . . . . . . 10mA

Current Drain Per Output Pin, I . . . . . . . . . . . . . . . . . . . . . . . . 40mA

Operating Conditions

Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +3.0V to +6.0V

Standby (Timekeeping) Voltage . . . . . . . . . . . . . . . . . +2.2V to +6.0V

Temperature Range

CDP68HC68T1E (PDIP Package) . . . . . . . . . . . . . .-40°C to 85°C

CDP68HC68T1M/M2 (SOIC Packages) . . . . . . . . .-40°C to 85°C

Input High Voltage . . . . . . . . . . . . . . . . . . . . . . . .(0.7 x VDD) to VDD

Input Low Voltage . . . . . . . . . . . . . . . . . . . . . . . . . 0V to (0.3 x VDD)

Serial Clock Frequency (fSCK). . . . . . . . . . . . . . . . . . +3.0V to +6.0V

Thermal Resistance (Typical, Note 1)

θJA (°C/W)

16 Ld PDIP* . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

16 Ld SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

100

20 Ld SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Maximum Junction Temperature (Plastic) . . . . . . . . . . . . . . . . 150°C

Maximum Storage Temperature Range (TSTG). . . . .-65°C to 150°C

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300°C

(SOIC, Lead Tips Only)

*Pb-free PDIPs can be used for through hole wave solder processing

only. They are not intended for use in Reflow solder processing.

applications.

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the

device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.

Static Electrical Specifications At TA = -40°C to +85°C, VDD = VBATT = 5V ±5%, except as noted.

PARAMETER

CONDITIONS

CDP68HC68T1

UNITS

MIN

(NOTE 2) TYP

MAX

Quiescent Device CurrentIDD

-1

µA

Output Voltage High LevelVOH

IOH = -1.6mA, VDD = 4.5V

3.7

Output Voltage Low LevelVOL

IOL = 1.6mA, VDD = 4.5V

-0.4

Output Voltage High LevelVOH

IOH ≤ 10µA, VDD = 4.5V

4.4

Output Voltage Low LevelVOL

IOL ≤ 10µA, VDD = 4.5V

-0.1

Input Leakage CurrentIIN

±1

µA

Three-State Output Leakage CurrentIOUT

±10

Operating Current (Note 3)

(ID + IB) VDD = VB = 5V

Crystal Operation

32kHz

0.08

0.01

1MHz

0.5

0.6

2MHz

0.7

0.84

4MHz

1.2

Pin 14

External Clock (Squarewave) (Note 3)

(ID + IB) VDD = VS = 5V

32kHz

0.02

0.024

1MHz

0.1

0.12

2MHz

0.2

0.24

4MHz

0.4

0.5

Standby Current (Note 3)IB

VS = 3V

Crystal Operation

32kHz

µA

1MHz

200

250

2MHz

300

360

4MHz

500

600

Operating Current (Note 3)

VDD = 5V, VB = 3V

Crystal Operation

32kHz

1MHz

0.08

0.15

0.1

0.18

2MHz

0.15

0.25

0.18

0.3

4MHz

0.3

0.4

0.36

0.5

CDP68HC68T1M2 数据表(PDF) 3 Page - Intersil Corporation

CDP68HC68T1M2 数据表(HTML) 3 Page - Intersil Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

数据表下载

链接网址

CDP68HC68T1M2 数据表(PDF) 3 Page - Intersil Corporation

CDP68HC68T1M2 数据表(HTML) 3 Page - Intersil Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

数据表 下载

链接网址

数据表下载