January 1995

2

Philips Semiconductors

Product specification

Dual JK flip-flop

HEF4027B

flip-flops

DESCRIPTION

The HEF4027B is a dual JK flip-flop which is

edge-triggered and features independent set direct

(O,O). Data is accepted when CP is LOW, and transferred

to the output on the positive-going edge of the clock. The

The outputs are buffered for best system performance.

Schmitt-trigger action in the clock input makes the circuit

highly tolerant to slower clock rise and fall times.

Fig.1 Functional diagram.

Fig.2 Pinning diagram.

FUNCTION TABLES

Notes

1. H = HIGH state (the more positive voltage)

L = LOW state (the less positive voltage)

X = state is immaterial

= positive-going transition

PINNING

See Family Specifications

INPUTS

OUTPUTS

CP

J

K

O

O

HL

X

X

X

H

L

LH

X

X

X

L

H

HH

X

X

X

H

H

INPUTS

OUTPUTS

CP

J

K

L

L

L

L

no change

LL

H

L

H

L

LL

L

H

L

H

LL

H

H

J,K

synchronous inputs

CP

clock input (L to H edge-triggered)

asynchronous set-direct input (active HIGH)

asynchronous clear-direct input (active HIGH)

O

true output

O

complement output

HEF4027BP(N):

16-lead DIL; plastic (SOT38-1)

HEF4027BD(F):

16-lead DIL; ceramic (cerdip) (SOT74)

HEF4027BT(D):

16-lead SO; plastic (SOT109-1)

( ): Package Designator North America