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AM29F400B 数据表(PDF) 41 Page - Advanced Micro Devices

部件名 AM29F400B
功能描述  4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 5.0 Volt-only Boot Sector Flash Memory
PDF  43 Pages
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制造商  AMD [Advanced Micro Devices]
网页  http://www.amd.com
标志 AMD - Advanced Micro Devices

AM29F400B 数据表(HTML) 41 Page - Advanced Micro Devices

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November 1, 2006 21505E5
Am29F400B
39
D A TA
SH EE T
REVISION SUMMARY
Revision A (August 1997)
Initial release.
Revision B (October 1997)
Global
Added -55 and -60 speed options, deleted -65 speed
option. Changed data sheet designation from Advance
Information to Preliminary.
Connection Diagrams
Corrected pinouts on all packages: deleted A18.
Table 1, Device Bus Operations
Revised to indicate inputs for both CE# and RESET#
are required for standby mode.
Sector Protection/Unprotection
Corrected text to indicate that these functions can only
be implemented using programming equipment.
Program Command Sequence
Changed to indicate Data# Polling is active for 2 µs
after a program command sequence if the sector spec-
ified is protected.
Sector Erase Command Sequence and DQ3: Sector
Erase Timer
Corrected sector erase timeout to 50 µs.
Erase Suspend Command
Changed to indicate that the device suspends the
erase operation a maximum of 20 µs after the rising
edge of WE#.
DC Characteristics
Changed to indicate VID min and max values are 11.5
to 12.5 V,with a VCC test condition of 5.0 V. Revised ILIT
to 50 µA. Added ICC4 specification. Added typical
values to TTL/NMOS table. Revised CMOS typical
standby current (ICC3).
Figure 14: Chip/Sector Erase Operation Timings;
Figure 19: Alternate CE# Controlled Write
Operation TImings
Corrected hexadecimal values in address and data
waveforms.
AC Characteristics, Erase/Program Operations
Corrected tAH specification for -90 speed option to 45
ns.
Erase and Programming Performance
Corrected word and chip programming times.
Revision C (January 1998)
Global
Formatted for consistency with other 5.0 volt-only
data sheets.
AC Characteristics
Changed tDF and TFLQZ to 15 ns for -55 speed option.
Revision C+1 (February 1998)
Table 2, Top Boot Block Sector Address Table
Corrected the sector size for SA10 to 16 Kbytes/
8 Kwords.
DC Characteristics—TTL/NMOS Compatible
Deleted Note 4.
Revision C+2 (April 1998)
Distinctive Characteristics
Changed minimum 100K write/erase cycles guaran-
teed to 1,000,000.
Product Selector Guide, Ordering Information
Added 55 ns ±10% speed option.
AC Characteristics
Word/Byte Configuration: Changed tFHQV specification
for 55 ns device.
Erase/Program Operations: Changed tWHWH1 word
mode specification to 12 µs. Corrected the notes refer-
ence for tWHWH1 and tWHWH2. These parameters are
100% tested. Corrected the note reference for tVCS.
This parameter is not 100% tested.
Changed tDS and tCP specifications for 55 ns device.
Alternate CE# Controlled Erase/Program Operations:
Changed tWHWH1 word mode specification to 12 µs.
Corrected the notes reference for tWHWH1 and tWHWH2.
These parameters are 100% tested.
Changed tDS and tCP specifications for 55 ns device.
Temporary Sector Unprotect Table
Added note reference for tVIDR. This parameter is not
100% tested.
Erase and Programming Performance
Changed minimum 100K program and erase cycles
guaranteed to 1,000,000.
Revision C+3 (June 1998)
Distinctive Characteristics
High Performance: Changed “Access times as fast as
55 ns” to “Access times as fast as 45 ns”.



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