AM29LV033C datasheet(21/49 Pages) AMD

21 / 49 page

22268B5 September 12, 2006

Am29LV033C

DA TA

SH EET

COMMAND DEFINITIONS

Writing specific address and data commands or se-

quences into the command register initiates device op-

erations. Table 9, on page 25 defines the valid register

command sequences. Writing incorrect address and

data values or writing them in the improper se-

quence resets the device to reading array data.

All addresses are latched on the falling edge of WE#

or CE#, whichever happens later. All data is latched on

the rising edge of WE# or CE#, whichever happens

first. Refer to the appropriate timing diagrams in “AC

Characteristics” on page 34.

Reading Array Data

The device is automatically set to reading array data

after device power-up. No commands are required to

retrieve data. The device is also ready to read array

data after completing an Embedded Program or Em-

bedded Erase algorithm.

After the device accepts an Erase Suspend command,

the device enters the Erase Suspend mode. The sys-

tem can read array data using the standard read tim-

ings, except that if it reads at an address within

erase-suspended sectors, the device outputs status

data. After completing a programming operation in the

Erase Suspend mode, the system may once again

read array data with the same exception. See “Erase

Suspend/Erase Resume Commands” on page 23 for

more information on this mode.

The system must issue the reset command to re-en-

able the device for reading array data if DQ5 goes

high, or while in the autoselect mode. See the “Reset

Command” on page 21 section, next.

See also “Requirements for Reading Array Data” on

page 11 in the “Device Bus Operations” section for

more information. The Read Operations table provides

the read parameters, and Figure 13, on page 34

shows the timing diagram.

Reset Command

Writing the reset command to the device resets the

device to reading array data. Address bits are don’t

care for this command.

The reset command may be written between the se-

quence cycles in an erase command sequence before

erasing begins. This resets the device to reading array

data. Once erasure begins, however, the device ig-

nores reset commands until the operation is complete.

The reset command may be written between the se-

quence cycles in a program command sequence be-

fore programming begins. This resets the device to

reading array data (also applies to programming in

Erase Suspend mode). Once programming begins,

however, the device ignores reset commands until the

operation is complete.

The reset command may be written between the se-

quence cycles in an autoselect command sequence.

Once in the autoselect mode, the reset command

must be written to return to reading array data (also

applies to autoselect during Erase Suspend).

If DQ5 goes high during a program or erase operation,

writing the reset command returns the device to read-

ing array data (also applies during Erase Suspend).

Autoselect Command Sequence

The autoselect command sequence allows the host

system to access the manufacturer and devices

codes, and determine whether or not a sector is pro-

tected. Table9, on page25 shows the address and

data requirements. This method is an alternative to

that shown in Table 3, on page 15, which is intended

for PROM programmers and requires VID on address

bit A9.

The autoselect command sequence is initiated by writ-

ing two unlock cycles, followed by the autoselect com-

mand. The device then enters the autoselect mode,

and the system may read at any address any number

of times, without initiating another command se-

quence. A read cycle at address XX00h retrieves the

manufacturer code. A read cycle at address XX01h re-

turns the device code. A read cycle containing a sector

address (SA) and the address 02h returns 01h if that

sector is protected, or 00h if it is unprotected. Refer to

Table 4, on page 16 for valid sector addresses.

The system must write the reset command to exit the

autoselect mode and return to reading array data.

Byte Program Command Sequence

The device programs one byte of data for each pro-

gram operation. The command sequence requires four

bus cycles, and is initiated by writing two unlock write

cycles, followed by the program set-up command. The

program address and data are written next, which in

turn initiate the Embedded Program algorithm. The

system is not required to provide further controls or

timings. The device automatically generates the pro-

gram pulses and verifies the programmed cell margin.

Table 9, on page 25 shows the address and data re-

quirements for the byte program command sequence.

When the Embedded Program algorithm is complete,

the device then returns to reading array data and ad-

dresses are no longer latched. The system can deter-

mine the status of the program operation by using

DQ7, DQ6, or RY/BY#. See “Write Operation Status”

on page 26 for information on these status bits.

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