AM29PDL128G35PEE datasheet(69/71 Pages) AMD

69 / 71 page

Am29PDL128G

October 28, 2004

P R E L IM IN A R Y

REVISION SUMMARY

Revision A (October 29, 2001)

Initial release.

Revision A+1 (November 13, 2001)

Simultaneous Operation Block Diagram

Added drawing.

Table 13. “Primary Vendor-Specific Extended

Query”

Corrected data for 4Dh and 4Eh addresses (dou-

ble-word mode).

Physical Dimensions

Added LAB080 package drawing.

Revision A+2 (February 8, 2002)

Global

Added 90 ns speed option. At this speed, t

DF is 30 ns

and t

OH is 5 ns. For all speeds, changed typical word

programming time to 8.6 µs, and typical double word

programming time to 12.6 µs.”

Simultaneous Operation Block Diagram

Deleted BYTE# input.

Revision B (April 26, 2002)

Global

Added 70R (regulated voltage range) to speed op-

tions.

Ordering Information

Added “V” to package marking.

Device Bus Operations

Corrected sector size references in sector address ta-

ble.

Password Protection Mode section: Clarified that first

8 bytes of SecSi Sector should be reserved for the

password. Added description of using password and

SecSi Sector concurrently.

SecSi Sector Flash Memory Region

Added section on using password and SecSi Sector

concurrently.

Table 13. “Primary Vendor-Specific Extended

Query”

Corrected data for addresses 4D and 4Eh.

Command Definitions

Deleted PPB Status Command section.

Password Program Command section: Modified first

paragraph.

Password Unlock Command section: Modified second

paragraph.

PPB Lock Bit Set Command section: Modified entire

section.

Substantial modifications were made to the command

definitions tables and notes, including the following:

deleted the PPB Status command sequence; added

bank address requirements to SecSi Sector com-

mand; separated memory array and sector protection

command sequences for easier reference.

DC Characteristics

In Note 1 of the CMOS Compatible table, changed typ-

ical I

CC current from 2 to 4mA/MHz. Changed ICC1 typi-

cal and maximum read currents, added currents for 10

MHz operation. Added specifications for intra-page

read current. Changed I

CC6 typical current to 30 mA.

Revision B+1 (June 7, 2002)

Global

Changed data sheet status from Advance Information

to Preliminary.

AC Characteristics: Read-only Operations table

Changed t

OE fo r 9 0 ns s p eed f r om 4 0 t o 35 ns.

Changed t

OH for 70 ns speeds from 4 to 5 ns.

AC Characteristics: Erase and Program Operations

table, Alternate CE# Controlled Erase and Program

Operations table

Changed t

ASO for 70 ns sp eed fr om 15 to 12 ns.

Changed t

DS fo r 80 ns s peed f r om 45 t o 35 ns.

Changed t

OEPH from 20 to 10 ns. Changed all typical

values from t

WHWH1.

Erase and Programming Performance

Added or modified typical and maximum values to all

parameters in table except for typical sector erase

time.

Revision B+2 (July 29, 2002)

Global

Changed Simultaneous Operation Flash to Simulta-

neous Read/ Write Flash.

Changed all references to DPB to DYB.

BGA Package Capacitance

Replaced TSOP Pin Capacitance with FBGA Capaci-

tance data.

Table 7. Autoselect Codes (High Voltage Method)

Changed the A5 to A4 and A3 Sector Protection Verifi-

cation fields from L to H.

AM29PDL128G35PEE 数据表(PDF) 69 Page - Advanced Micro Devices

AM29PDL128G35PEE 数据表(HTML) 69 Page - Advanced Micro Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71

数据表下载

链接网址

AM29PDL128G35PEE 数据表(PDF) 69 Page - Advanced Micro Devices

AM29PDL128G35PEE 数据表(HTML) 69 Page - Advanced Micro Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71

数据表 下载

链接网址

数据表下载