M500000013 datasheet(65/70 Pages) SPANSION

部件名	M500000013

功能描述	64 Megabit (4 M x 16-Bit) and 32 Megabit (2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memories, and 8 Mbit

PDF	70 Pages

Scroll/Zoom	100%

制造商	SPANSION [SPANSION]

网页	http://www.spansion.com

标志

65 / 70 page

Am50DL9608G

May 19, 2003

P R E L I M I NARY

PSEUDO SRAM AC CHARACTERISTICS

Notes:

1. UB#s and LB#s controlled.

2. t

CW is measured from CE1#s going low to the end of write.

3. t

WR is measured from the end of write to the address change. tWR applied in case a write ends as CE1#s or WE# going high.

4. t

AS is measured from the address valid to the beginning of write.

5. A write occurs during the overlap (t

WP) of low CE#1s and low WE#. A write begins when CE1#s goes low and WE# goes low

when asserting UB#s or LB#s for a single byte operation or simultaneously asserting UB#s and LB#s for a double byte operation.

A write ends at the earliest transition when CE1#s goes high and WE# goes high. The t

WP is measured from the beginning of write

to the end of write.

Figure 32.

Pseudo SRAM Write Cycle—

UB#s and LB#s Control

Address

Data Valid

UB#s, LB#s

WE#

Data In

Data Out

High-Z

tWC

CE1#s

CE2s

tAW

tBW

tDW

tDH

tWR (See Note 3)

tAS

(See Note 4)

tCW

(See Note 2)

tCW (See Note 2)

tWP

(See Note 5)

M500000013 数据表(PDF) 65 Page - SPANSION

M500000013 数据表(HTML) 65 Page - SPANSION

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