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P83CL882 数据表(PDF) 21 Page - NXP Semiconductors |
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P83CL882 数据表(HTML) 21 Page - NXP Semiconductors |
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21 / 88 page  2001 Jun 19 21 Philips Semiconductors Product specification 80C51 Ultra Low Power (ULP) telephony controller P83CL882 Table 15 Interrupt related SFRs SFR DESCRIPTION SFR ADDRESS RESET VALUE IEN0 interrupt enable register 0 A8H 0000 0000 IEN1 interrupt enable register 1 (INT2 to INT9) E8H 0000 0000 IEN2 interrupt enable register 2 F1H 0000 0000 IP0 interrupt priority register 0 B8H 0000 0000 IP1 interrupt priority register 1 (INT2 to INT9) F8H 0000 0000 IP2 interrupt priority register 2 F9H 0000 0000 IX1 external interrupt polarity register 1 E9H 0000 0000 ISE1 external interrupt sensitivity register 1 E1H 0000 0000 IRQ1 external interrupt request flag register 1 C0H 0000 0000 handbook, full pagewidth MGR125 Interrupt level 2x Interrupt level 1 Program level 0 RETI Level 21 RETI Level 20 RETI one instruction IP = 1 IP = 1 IP = 0 Fig.11 Interrupt hierarchy. |
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