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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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AT91 数据表(PDF) 26 Page - ATMEL Corporation |
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AT91 数据表(HTML) 26 Page - ATMEL Corporation |
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26 / 153 page  26 AT91X40 Series 1354D–ATARM–08/02 Boot on NCS0 Depending on the device and the BMS pin level during the reset, the user can select either an 8-bit or 16-bit external memory device connected on NCS0 as the Boot Mem- ory. In this case, EBI_CSR0 (Chip Select Register 0) is reset at the following configuration for chip select 0: • 8 wait states (WSE = 1, NWS = 7) • 8-bit or 16-bit data bus width, depending on BMS Byte access type and number of data float time are respectively set to Byte Write Access and 0. With a non-volatile memory interface, any values can be programmed for these parameters. Before the remap command, the user can modify the chip select 0 configuration, pro- gramming the EBI_CSR0 with exact boot memory characteristics. the base address becomes effective after the remap command, but the new number of wait states can be changed immediately. This is useful if a boot sequence needs to be faster. |
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