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PCD3755AT 数据表(PDF) 13 Page - NXP Semiconductors |
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PCD3755AT 数据表(HTML) 13 Page - NXP Semiconductors |
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13 / 32 page ![]() 1997 Apr 16 13 Philips Semiconductors Product specification 8-bit microcontrollers with DTMF generator, 8 kbytes OTP and 128 bytes EEPROM PCD3755A; PCD3755E; PCD3755F 7.1 EEPROM registers 7.1.1 EEPROM CONTROL REGISTER (EPCR) The behaviour of the EEPROM and Timer 2 section is defined by the EEPROM Control Register. Table 10 EEPROM Control Register (address 04H, access type R/W) Table 11 Description of EPCR bits Table 12 Mode selection; X = don’t care 76543210 STT2 ET2I T2F EWP MC3 MC2 MC1 0 BIT MNEMONIC DESCRIPTION 7 STT2 Start T2. If STT2 = 0, then Timer 2 is stopped; T2 value held. If STT2 = 1, then T2 decrements from reload value. 6 ET2I Enable T2 interrupt. If ET2I = 0, then T2F event cannot request interrupt. If ET2I = 1, then T2F event can request interrupt. 5 T2F Timer 2 flag. Set when T2 underflows (or by program); reset by program. 4 EWP Erase or write in progress (EWP). Set by program (EWP starts EEPROM erase and/or write and Timer 2). Reset at the end of EEPROM erase and/or write. 3 MC3 Mode control 3 to 1. These three bits in conjunction with bit EWP select the mode as shown in Table 12. 2 MC2 1 MC1 0 − This bit is set to a logic 0. EWP MC3 MC2 MC1 DESCRIPTION 0 0 0 0 read byte 0 0 1 0 increment mode 1 0 1 X write page 1 1 0 0 erase/write page 1 1 1 1 erase page X 0 0 1 not allowed X1 0 1 X1 1 0 |
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