1997 Nov 19

8

Philips Semiconductors

Objective specification

DECT baseband controller

PCD5095

P2.2

75

I/O

H

ISQ2CPES

bidirectional 80C51 port pin

A16

76

O

L

ISP4DPES

address bit 16 for 128 kbytes external program memory

77

−−

supply

positive supply voltage 2 for the +5 V interface

78

−−

supply

negative supply voltage 4

TST1

79

I

−

DIDP0PES

test input 1

TST2

80

I

−

DIDP0PES

test input 2

P2.3

81

I/O

H

ISQ2CPES

bidirectional 80C51 port pin

P2.4

82

I/O

H

ISQ2CPES

bidirectional 80C51 port pin

P2.5

83

I/O

H

ISQ2CPES

bidirectional 80C51 port pin

P2.6

84

I/O

H

ISQ2CPES

bidirectional 80C51 port pin

P2.7

85

I/O

H

ISQ2CPES

bidirectional 80C51 port pin

PSE

86

O

H

ISQ2CPES

program store enable (80C51); active LOW

ALE

87

O

H

ISQ4CPES

address latch enable (80C51)

EA

88

I

−

ISF2DPES

external access enable (80C51); active LOW

89

−−

supply

negative supply voltage 5

90

−−

supply

positive supply voltage 3 for the +5 V interface

P0.7

91

I/O

off

H

ISP2DPES

ISQ2CPES

bidirectional 80C51 port pin

(ISQ2CPES in PCD5090/xxx, PCA5097/xxx)

P0.6

92

I/O

off

H

ISP2DPES

ISQ2CPES

bidirectional 80C51 port pin

(ISQ2CPES in PCD5090/xxx, PCA5097/xxx)

P0.5

93

I/O

off

H

ISP2DPES

ISQ2CPES

bidirectional 80C51 port pin

(ISQ2CPES in PCD5090/xxx, PCA5097/xxx)

P0.4

94

I/O

off

H

ISP2DPES

ISQ2CPES

bidirectional 80C51 port pin

(ISQ2CPES in PCD5090/xxx, PCA5097/xxx)

P0.3

95

I/O

off

H

ISP2DPES

ISQ2CPES

bidirectional 80C51 port pin

(ISQ2CPES in PCD5090/xxx, PCA5097/xxx)

P0.2

96

I/O

off

H

ISP2DPES

ISQ2CPES

bidirectional 80C51 port pin

(ISQ2CPES in PCD5090/xxx, PCA5097/xxx)

P0.1

97

I/O

off

H

ISP2DPES

ISQ2CPES

bidirectional 80C51 port pin

(ISQ2CPES in PCD5090/xxx, PCA5097/xxx)

P0.0

98

I/O

off

H

ISP2DPES

ISQ2CPES

bidirectional 80C51 port pin

(ISQ2CPES in PCD5090/xxx, PCA5097/xxx)

M_RESET

99

I

−

DIDP0PES

master reset input (Schmitt trigger)

RESET_OUT

100

O

H

ISF2DPES

reset output

SYMBOL

PIN

I/O

STATE

AFTER

RESET

PIN TYPE

PIN DESCRIPTION