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PCD8544 数据表(PDF) 18 Page - NXP Semiconductors |
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PCD8544 数据表(HTML) 18 Page - NXP Semiconductors |
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18 / 32 page  1999 Apr 12 18 Philips Semiconductors Product specification 48 × 84 pixels matrix LCD controller/driver PCD8544 11 DC CHARACTERISTICS VDD = 2.7 to 3.3 V; VSS =0V; VLCD = 6.0 to 9.0 V; Tamb = −25 to +70 °C; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT VDD1 supply voltage 1 LCD voltage externally supplied (voltage generator disabled) 2.7 − 3.3 V VDD2 supply voltage 2 LCD voltage internally generated (voltage generator enabled) 2.7 − 3.3 V VLCD1 LCD supply voltage LCD voltage externally supplied (voltage generator disabled) 6.0 − 9.0 V VLCD2 LCD supply voltage LCD voltage internally generated (voltage generator enabled); note 1 6.0 − 8.5 V IDD1 supply current 1 (normal mode) for internal VLCD VDD = 2.85 V; VLCD = 7.0 V; fSCLK = 0; Tamb =25 °C; display load = 10 µA; note 2 − 240 300 µA IDD2 supply current 2 (normal mode) for internal VLCD VDD = 2.70 V; VLCD = 7.0 V; fSCLK = 0; Tamb =25 °C; display load = 10 µA; note 2 −− 320 µA IDD3 supply current 3 (Power-down mode) with internal or external LCD supply voltage; note 3 − 1.5 −µA IDD4 supply current external VLCD VDD = 2.85 V; VLCD = 9.0 V; fSCLK = 0; notes 2 and 4 − 25 −µA ILCD supply current external VLCD VDD = 2.7 V; VLCD = 7.0 V; fSCLK = 0; T = 25 °C; display load = 10 µA; notes 2 and 4 − 42 −µA Logic VIL LOW level input voltage VSS − 0.3VDD V VIH HIGH level input voltage 0.7VDD − VDD V IL leakage current VI =VDD or VSS −1 − +1 µA Column and row outputs Ro(C) column output resistance C0 to C83 − 12 20 k Ω Ro(R) row output resistance R0 to R47 − 12 20 k Ω Vbias(tol) bias voltage tolerance on C0 to C83 and R0 to R47 −100 0 +100 mV |
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