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TMP102 数据表(PDF) 21 Page - Texas Instruments |
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TMP102 数据表(HTML) 21 Page - Texas Instruments |
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21 / 36 page ![]() Controller drives SDA Target drives SDA S A6 A5 A4 A3 A2 A1 A0 0 A 0 0 0 0 0 0 P1 P0 A D15 D14 D13 D12 D11 D10 D9 D8 A D7 D6 D5 D4 D3 D2 D1 D0 NA P START R/W ACK from Target ACK from Target ACK from Controller NACK from Controller STOP Target Address Register Pointer (N) Data to Register N (MSB) Data to Register N (LSB) RS A6 A5 A4 A3 A2 A1 A0 1 A START R/W Target Address Figure 7-10. Read from Single Register 7.5.4.3 General Call Reset Function The TMP110 responds to a general-call address (0000 000) if the eighth bit is 0b. The device acknowledges the general-call address and responds to commands in the second byte. If the second byte is 0000b 0110b, the TMP110 internal registers are reset to power-up values as shown in SMBus General Call Reset Timing Diagram. The serial address is unaffected by the general call reset. S 0 0 0 0 0 0 0 0 A START General Call Address 0 0 0 0 1 1 0 A 0 ACK from Target ACK from Target Target controls SDA line Controller controls SDA line P STOP Reset Command Figure 7-11. SMBus General Call Reset Timing Diagram 7.5.4.4 SMBus Alert Response The TMP110 device supports the SMBus alert response. When the TMP110 operates in Alert Mode, and the ALERT pin is available, the controller can sense that an alert condition is present. Irrespective of the availability of the ALERT pin, the alert status is set. As shown in Figure 7-12, if the controller sends an SMBus alert command (19h or 00011001b) on the bus, and the alert is set, the device acknowledges the SMBus alert www.ti.com TMP110 SNIS233 – FEBRUARY 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 21 Product Folder Links: TMP110 |
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