PCF8566 datasheet(26/40 Pages) PHILIPS

26 / 40 page

1998 May 04

Philips Semiconductors

Product speciﬁcation

Universal LCD driver for low multiplex

rates

PCF8566

10 DC CHARACTERISTICS

VSS =0V; VDD = 2.5 to 6 V; VLCD =VDD − 2.5 to VDD − 6 V; Tamb = −40 to +85 °C; unless otherwise speciﬁed.

Notes

1. Outputs open; inputs at VSS or VDD; external clock with 50% duty factor; I2C-bus inactive.

2. Resets all logic when VDD <Vref.

3. Periodically sampled, not 100% tested.

4. Outputs measured one at a time.

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

Supplies

VDD

operating supply voltage

2.5

−

VLCD

LCD supply voltage

VDD − 6

−

VDD − 2.5 V

IDD

operating supply current

(normal mode)

fCLK = 200 kHz; note 1

−

µA

ILP

power saving mode supply current

VDD = 3.5 V; VLCD =0V;

fCLK = 35 kHz; A0,

A1 and A2 tied to VSS;

note 1

−

µA

Logic

VIL

LOW level input voltage

VSS

−

0.3VDD

VIH

HIGH level input voltage

0.7VDD

−

VDD

VOL

LOW level output voltage

IO =0mA

−−

0.05

VOH

HIGH level output voltage

IO =0mA

VDD − 0.05 −−

IOL1

LOW level output current

(CLK and SYNC)

VOL =1V; VDD =5V

−−

IOH

HIGH level output current (CLK)

VOH =4V; VDD =5V

−−

−1mA

IOL2

LOW level output current

(SDA and SCL)

VOL = 0.4 V; VDD =5V

−−

ILI

leakage current

(SA0, CLK, OSC, A0, A1, A2, SCL

and SDA)

VI =VSS or VDD

−−

±1

µA

Ipd

pull-down current

(A0, A1, A2 and OSC)

VI =1V; VDD = 5 V

150

µA

RpuSYNC

pull-up resistor (SYNC)

Ω

Vref

power-on reset level

note 2

−

1.3

tsw

tolerable spike width on bus

−−

100

input capacitance

note 3

−−

7pF

LCD outputs

VBP

DC voltage component

(BP0 to BP3)

CBP =35nF

−±20

−

DC voltage component (S0 to S23)

CS =5nF

−±20

−

ZBP

output impedance (BP0 to BP3)

VLCD =VDD − 5 V; note 4 −

Ω

output impedance (S0 to S23)

VLCD =VDD −5 V; note 4

−

Ω

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