1997 Mar 28

11

Philips Semiconductors

Product specification

Clock/calendar with Power Fail Detector

PCF8573

Table 3

MODE-POINTER-word, CONTROL-nibble (bits 8, 7, 6 and 5)

Note

1. If the seconds counter is below 30 there is no carry. This causes a time adjustment of max.

−30 s. From the count

30 there is a carry which adjusts the time by max.

+30 s.

Table 4

MODE-POINTER-word, ADDRESS-nibble (bits 4, 3, 2 and 1)

At the end of each data word the address bits B1, B0 will be incremented automatically provided the preceding

CONTROL-nibble is set to EXECUTE ADDRESS. There is no carry to B2.

Table 5 shows the placement of the BCD upper and lower digits in the DATA byte for writing into the addressed part of

the time counter and alarm register respectively.

Table 6 shows the acknowledgement response of the clock calendar as a slave receiver.

Table 5

Placement of BCD digits in the DATA byte; note 1

Note

1. ‘X’ is the don’t care bit; ‘D’ is the data bit.

BIT 8

C2

C1

C0

FUNCTION

0000

execute address

0001

read control/status flags

0010

reset prescaler, including seconds counter; without carry for minute counter

0011

time adjust, with carry for minute counter (note 1)

0100

reset NODA flag

0101

set NODA flag

0110

reset COMP flag

BIT 4

B2

B1

B0

ADDRESSED TO:

0000

time counter hours

0001

time counter minutes

0010

time counter days

0011

time counter months

0100

alarm register hours

0101

alarm register minutes

0110

alarm register days

0111

alarm register months

MSB

DATA

LSB

UPPER DIGIT

LOWER DIGIT

UD

UC

UB

UA

LD

LC

LB

LA

ADDRESSED TO:

X

X

D

DDDD

D

hours

X

D

D

DDDD

D

minutes

X

X

D

DDDD

D

days

X

X

X

DDDD

D

months