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MGL543

S

0

1

0

0

A2

A1

A0

1

A

P07 P06 P05 P04

P07 to P00

P17 to P10

P07 to P00

P17 to P10

P07 to P00

P17 to P10

P03 P02 P01 P00

P17

P10

R/W

acknowledge

from slave

A

A

P07

P00

A

P17

P10

1P

SDA

SCL

READ FROM PORT

th

DATA INTO PORT

INT

acknowledge

from receiver

acknowledge

from receiver

acknowledge

from receiver

non acknowledge

from receiver

tsu

tir

tir

tiv

Fig.6 READ mode (input).

A LOW-to-HIGH transition of SDA, while SCL is HIGH is defined as the STOP condition (P). Transfer of data can be stopped at any moment by a STOP condition. When this occurs, data present

at the latest acknowledge phase is valid (output mode). Input data is lost.