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PCF8576CU/2 数据表(PDF) 35 Page - NXP Semiconductors

部件名 PCF8576CU/2
功能描述  Universal LCD driver for low multiplex rates
PDF  44 Pages
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制造商  PHILIPS [NXP Semiconductors]
网页  http://www.nxp.com
标志 PHILIPS - NXP Semiconductors

PCF8576CU/2 数据表(HTML) 35 Page - NXP Semiconductors

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1998 Jul 30
35
Philips Semiconductors
Product specification
Universal LCD driver for low multiplex
rates
PCF8576C
12.1
Chip-on-glass cascadability in single plane
In chip-on-glass technology, where driver devices are
bonded directly onto glass of the LCD, it is important that
the devices may be cascaded without the crossing of
conductors, but the paths of conductors can be continued
on the glass under the chip. All of this is facilitated by the
PCF8576C bonding pad layout (Fig.30). Pads needing bus
interconnection between all PCF8576Cs of the cascade
are VDD, VSS, VLCD, CLK, SCL, SDA and SYNC. These
lines may be led to the corresponding pads of the next
PCF8576C through the wide opening between VLCD pad
and the backplane output pads.
The only bus line that does not require a second opening
to lead through to the next PCF8576C is VLCD, being the
cascade centre. The placing of VLCD adjacent to VSS
allows the two supplies to be tied together.
When an external clocking source is to be used, OSC of all
devices should be tied to VDD. The pads OSC, A0, A1, A2
and SA0 have been placed between VSS and VDD to
facilitate wiring of oscillator, hardware subaddress and
slave address.
13 BONDING PAD LOCATIONS
Fig.30 Bonding pad locations.
Chip dimensions: approximately 2.92
× 3.20 mm.
Pad area: 0.0121 mm2.
Bonding pad dimensions: 110
× 110 µm.
S33
S32
S31
S29
S30
S28
S26
S25
S27
S24
S23
S22
S20
S21
S19
S18
A1
A2
2.92 mm
SA0
V
V
BP0
BP2
BP1
BP3
S1
S0
S2
S3
PCF8576C
LCD
SS
3.20
mm
MBE536
1
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
29
28
27
26
25
24
23
22
21
20
19
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17
16
15
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10
9
8
12
30
31
32
33
34
234
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x
y
0
0



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