2

AT25FS010

5167B–SFLSH–1/07

The AT25FS010 is enabled through the Chip Select pin (CS) and accessed via a 3-wire

interface consisting of Serial Data Input (SI), Serial Data Output (SO), and Serial Clock

(SCK). All write cycles are completely self-timed.

BLOCK WRITE protection for upper 1/32, 1/16, 1/8, 1/4, 1/2 or the entire memory array

is enabled by programming the status register. Separate write enable and write disable

instructions are provided for additional data protection. Hardware data protection is pro-

vided via the WP pin to protect against inadvertent write attempts to the status register.

The HOLD pin may be used to suspend any serial communication without resetting the

serial sequence.

Figure 1. Block Diagram

Absolute Maximum Ratings*

Operating Temperature....................................–40

°C to +85°C

*NOTICE:

Stresses beyond those listed under “Absolute

Maximum Ratings” may cause permanent dam-

age to the device. This is a stress rating only and

functional operation of the device at these or any

other conditions beyond those indicated in the

operational sections of this specification is not

implied. Exposure to absolute maximum rating

conditions for extended periods may affect

device reliability.

Storage Temperature .....................................–65

°C to +150°C

Voltage on Any Pin

with Respect to Ground .................................... –1.0V to +5.0V

Maximum Operating Voltage ............................................ 4.2V

DC Output Current........................................................ 5.0 mA

524,288 x 8