Philips Semiconductors

Product specification

PCK2000M

CK97 (66/100MHz) Mobile System Clock Generator

1998 Sep 29

3

PIN DESCRIPTION

PIN NUMBER

SYMBOL

FUNCTION

26

REF

14.318 MHz clock output

28

GROUND for REF output

27

POWER for REF output

1

XTAL_IN

14.318 MHz crystal input

2

XTAL_OUT

14.318 MHz crystal output

3, 12

GROUND for PCI outputs

4

PCICLK_F

Free-running PCI output

6, 9

POWER for PCI outputs

5, 7, 8, 10, 11

PCICLK [1–5]

PCI clock outputs.

13, 21

Isolated POWER for core

14, 20

Isolated GROUND for core

16

SEL

Logic select pins

15

SEL100/66

Select pin for enabling 66 MHz or 100MHz or 66 MHz. L = 66 Mhz

H = 100MHz

17

PWRDWN

Control pin to put device in powerdown state, active low

18

CPUSTOP

Control pin to disable CPU clocks, active low

19

PCISTOP

Control pin to disable PCI clocks, active low

25

Power for CPU outputs

22

GROUND for CPU outputs

23, 24

CPUCLK [0–1]

CPU and Host clock outputs 2.5V

NOTE:

BLOCK DIAGRAM

PWRDWN

LOGIC

STOP

LOGIC

STOP

LOGIC

PLL1

14.318

MHZ

OSC

PWRDWN

LOGIC

LOGIC

SW00275

X

X

X

X

X

X

X

X

X

X

X

REFCLK (14.318 MHz)

PWRDWN

PCISTOP

CPUSTOP

SEL0

SEL100/66

XTAL_IN

XTAL_OUT

CPUCLK [0–1]

PCICLK_F (33MHz)

PCICLK [1–5] (33MHz)