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PCK2001DL 数据表(PDF) 10 Page - NXP Semiconductors

部件名 PCK2001DL
功能描述  14.318-150 MHz I2C 1:18 Clock Buffer
PDF  13 Pages
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制造商  PHILIPS [NXP Semiconductors]
网页  http://www.nxp.com
标志 PHILIPS - NXP Semiconductors

PCK2001DL 数据表(HTML) 10 Page - NXP Semiconductors

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Philips Semiconductors
Product specification
PCK2001
14.318–150 MHz I2C 1:18 Clock Buffer
1999 Jul 06
10
SERIAL CONFIGURATION MAP
The serial bits will be read by the clock buffer in the following order:
Byte 0 – Bits 7, 6, 5, 4, 3, 2, 1, 0
Byte 1 – Bits 7, 6, 5, 4, 3, 2, 1, 0
Byte 2 – Bits 7, 6, 5, 4, 3, 2, 1, 0
All unused register bits (Reserved and N/A) should be desined as “Dont Care”. It is expected that the controller will force all of these bits to a “0”
level.
All register bits labeled “Initialize to 0” must be written to zero during intialization. Failure to do so may result in a higher than normal operating
current. The controller will read back the last written value.
Byte 0:
Output active/inactive register
1 = enable; 0 = disable
BIT
PIN#
NAME
DESCRIPTION
7
18
BUF_OUT7
Active/Inactive
6
17
BUF_OUT6
Active/Inactive
5
14
BUF_OUT5
Active/Inactive
4
13
BUF_OUT4
Active/Inactive
3
9
BUF_OUT3
Active/Inactive
2
8
BUF_OUT2
Active/Inactive
1
5
BUF_OUT1
Active/Inactive
0
4
BUF_OUT0
Active/Inactive
NOTE:
1. Inactive means outputs are held LOW and are disabled from switching. These outputs are designed to be configured at power-on and are
not expected to be configured during the normal modes of operation.
Byte 1:
Output active/inactive register
1 = enable; 0 = disable
BIT
PIN#
NAME
DESCRIPTION
7
45
BUF_OUT15
Active/Inactive
6
44
BUF_OUT14
Active/Inactive
5
41
BUF_OUT13
Active/Inactive
4
40
BUF_OUT12
Active/Inactive
3
36
BUF_OUT11
Active/Inactive
2
35
BUF_OUT10
Active/Inactive
1
32
BUF_OUT9
Active/Inactive
0
31
BUF_OUT8
Active/Inactive
NOTE:
1. Inactive means outputs are held LOW and are disabled from switching. These outputs are designed to be configured at power-on and are
not expected to be configured during the normal modes of operation.
Byte 2:
Optional register for possible future requirments
BIT
PIN#
NAME
DESCRIPTION
7
28
BUF_OUT17
Active/Inactive
6
21
BUF_OUT16
Active/Inactive
5
(reserved)
(reserved)
4
(reserved)
(reserved)
3
(reserved)
(reserved)
2
(reserved)
(reserved)
1
(reserved)
(reserved)
0
(reserved)
(reserved)
NOTE:
1. Inactive means outputs are held LOW and are disabled from switching. These outputs are designed to be configured at power-on and are
not expected to be configured during the normal modes of operation.



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