| 数据搜索系统,热门电子元器件搜索 |
|
ACT41000 数据表(PDF) 4 Page - Qorvo, Inc |
|
|
|||||||||||||||||||||||||||||
ACT41000 数据表(HTML) 4 Page - Qorvo, Inc |
|
4 / 72 page ![]() ACT41000 Programmable Voltage, Programmable Current, Low Noise RFPoL Step-Down Voltage Regulator Pin Functions PIN NAME DESCRIPTION 1 PGBIAS Power-good output of the Mini-buck Regulator and Auxiliary LDO. Open-drain and a pull-up resistor required. See PGBIAS Indicator Output. 2 VLDO Output voltage node of the Auxiliary LDO. Connect a good quality, fixed value 1 µF capacitor between this pin and the GND5V pin. See Auxiliary LDO. 3 V5V 5 V bias supply to the device and voltage feedback of the Mini-buck Regulator. Connect two good quality capacitors in parallel, two 10 µF and one 0.1 µF between this pin and the GND5V pin. Place the 0.1 µF capacitor with the minimum distance to the device. 4 GND5V Ground node for the Mini-buck Regulator. 5 SW5V Switching node of the Mini-buck Regulator. 6 VIN Power supply to the device. Connect a good quality 1 µF capacitor, at least, between this pin and the GND5V pin. On a PCB, tied to the PVIN pin. 7,8,17,18 PVIN Power supply to the Main-buck Regulator. Connect good quality two 22 µF capacitors, at least, between this pin and the PGND pins, also tie to the VIN pin. 9,10,15,16 PGND Ground node for the Main-buck Regulator. 11,12,13 SW Switching node of the Main-buck Regulator. 14 BOOT Bootstrap capacitor node for the Main-buck Regulator. Connect a good quality, fixed value 0.1 µF capacitor between this pin and the SW pin. 19 PG Power-good output of the Main-buck Regulator. Open-drain and a pull-up resistor required. 20 CSN Current sense feedback input to the Main-buck Regulator. See Output Current Sensing. 21 FB_VO Voltage feedback input to the Main-buck Regulator. See Reference Voltage Input. 22 COMP Error amplifier output. Connect a compensation network between this pin and the AGND pin. See Main-buck Compensation Network. 23 AGND Ground node for analog blocks of the device. 24 DACOUT Reference voltage output from the DAC. Usually, short to the REFIN pin. See Output Voltage Reference. 25 REFIN Reference voltage input to the Main-buck Regulator. See Reference Voltage Input. 26 ILIM Output current limit programming of the Main-buck Regulator. Connect a resistor between this pin and the AGND pin. See Output Current Reference. 27 ADDR I 2C address selection. Connect a resistor between this pin and the ground. See I2C Address Selection. 28 FREQ Switching frequency programming of the Main-buck Regulator. Connect a resistor between this pin and the AGND pin. See Clock Generator. 29 EN Enable logic input for the Main-buck Regulator. See Main-buck Enable Control. 30 SYNC Clock synchronizing input/output for the Main-buck Regulator. See Clock Synchronizer. 31 SCL Clock port of the I 2C Interface. Open-drain and a pull-up resistor required. 32 SDA Data port of the I 2C Interface. Open-drain and a pull-up resistor required. Exposed PAD Substrate contact for power dissipation. Connect to the PGND pins with a broad pattern. ACT41000 Data Sheet, Rev. B, 01-Apr-2022 Subject to change without notice 4 www.qorvo.com |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |