Philips Semiconductors

Product data

PCK2021

CK00 (100/133 MHz) spread spectrum differential

system clock generator

2001 Oct 11

3

PIN DESCRIPTION

PIN(S)

SYMBOL

FUNCTION

1, 2, 8, 9,

12, 18, 24,

25, 31, 37,

40

3.3 V power supply

Pins 9, 12, and 18 supply host output pairs 0, 1, and 2.

Pins 37 and 40 supply host output pairs 3, 4, and 5.

3, 4

48M_0/SELA

48M_1/SELB

3.3 V fixed 48 MHz clock outputs. During power-up pins function as latched inputs that enable SELA and

SELB prior to the pins being used for output of 3 V at 48 MHz. Part must be clocked to latch data in.

6

3V66

66 MHz clock: 66 MHZ reference clock

10, 11

HCLK0

HCLKB0

Host output pair 0

13, 14

HCLK1

HCLKB1

Host output pair 1

16, 17

HCLK2

HCLKB2

Host output pair 2

47, 48

PCI0

PCI1

33 MHz clocks: 33 MHz reference clocks

39, 38

HCLK3

HCLKB3

Host output pair 3

36, 35

HCLK4

HCLKB4

Host output pair 4

33, 32

HCLK5

HCLKB5

Host output pair 5

19

REF

3.3 V fixed 14.318 MHz output

20

SPREAD

Enables spread spectrum mode when held LOW on differential host outputs, 3V66 and PCI clocks.

Asserts LOW.

22

XIN

Crystal input

23

XOUT

Crystal output

26

This pin controls the reference current for the host pairs. This pin requires a fixed precision resistor tied to

ground in order to establish the correct current.

29, 30

MULTSEL0

MULTSEL1

Select input pin used to control the scaling of the HCLK and HCLKB output current.

41

PWRDWN

Device enters power-down mode when held LOW. Asserts LOW.

45

SEL133/100

Select input pin for enabling 133 MHz or 100 MHz CPU outputs

5, 7, 15,

21, 27, 28,

34, 46

Ground

43

3.3 V power supply for analog circuits

42

Ground for analog circuits