| 数据搜索系统,热门电子元器件搜索 |
|
AS7262 数据表(PDF) 18 Page - OSRAM GmbH |
|
|
|||||||||||||||||||||||||||||
AS7262 数据表(HTML) 18 Page - OSRAM GmbH |
|
18 / 48 page ![]() Datasheet, Public Page 17 [v4-00] 2022-Nov-30 Document Feedback AS7262 − Detailed Description Electronic Shutter with LED_DRV Driver Control There are two LED driver outputs that can be used to control up to 2 LEDs. This will allow different wavelength light sources to be used in the same system. The LED output sink currents are programmable and can drive external LED sources: LED_IND from 1mA, 2mA, 4mA and 8mA and LED_DRV from 12.5mA, 25mA, 50mA and 100mA. The sources can be turned off and on via I²C registers control or AT commands and provides the device with an electronic shutter. Interrupt Operation If BANK is set to Mode 0 or Mode 1 then the data is ready after the 1st integration time. If BANK is set to Mode 2 or Mode 3 then the data is ready after two integration times. If the interrupt is enabled (INT = 1) then when the data is ready, the INT line is pulled low and DATA_RDY is set to 1. The INT line is released (returns high) when the control register is read. DATA_RDY is cleared to 0 when any of the sensor registers V, B, G, Y, O & R are read. For multi-byte sensor data (2 or 4 bytes), after the 1st byte is read the remaining get shadow buffer protected in case an integration cycle completes just after the 1st byte is read. In continuous spectral conversion mode (BANK setting of Mode 0, 1, or 2), the sensors continue to gather information at the rate of the integration time, hence if the sensor registers are not read when the interrupt line goes low, it will stay low and the next cycle’s sensor data will be available in the registers at the end of the next integration cycle. When the control register BANK bits are written with a value of Mode 3, One-Shot Spectral Conversion mode is entered. When a single set of contemporaneous sensor readings is desired, writing BANK Mode 3 to the control register immediately triggers exactly two spectral data conversion cycles. At the end of these two conversion cycles, the DATA_RDY bit is set as for the other BANK modes. To perform a new One-Shot sequence, the control register BANK bits should be written with a value of Mode 3 again. This process may continue until the user writes a different value into the BANK bits. I²C Slave Interface If selected by the I²C_ENB pin setting, interface and control can be accomplished through an I²C compatible slave interface to a set of registers that provide access to device control functions and output data. These registers on the AS7262 are, in reality, implemented as virtual registers in software. The actual I²C slave hardware registers number only three and are described in the table below. The steps necessary to access the virtual registers defined in the following are explained in pseudocode for external I²C master writes and reads below. |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |