TMD26721 datasheet(25/44 Pages) OSRAM

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[v1-00] 2015-Mar-23

TMD2672 − Principles of Operation

Wait Time Register (0x03)

Wait time is set 2.73ms increments unless the WLONG bit is

asserted, in which case the wait times are 12× longer. WTIME is

programmed as a 2’s complement number. Upon power up, the

Wait Time Register is set to 0xFF.

Figure 30:

Proximity Time Control Register

Note(s) and/or Footnote(s):

1. The Proximity Wait Time Register should be configured before PEN is asserted.

Proximity Interrupt Threshold Register

(0x08 - 0x0B)

The Proximity Interrupt Threshold Registers provide the values

to be used as the high and low trigger points for the comparison

function for interrupt generation. If the value generated by

proximity channel crosses below the lower threshold specified,

or above the higher threshold, an interrupt is signaled to the

host processor.

Figure 31:

Proximity Interrupt Threshold Register

Field

Bits

Description

WTIME

7:0

Wait Time

Time (WLONG = 0)

Time (WLONG = 1)

0xFF

2.72ms

0.032 sec

0xB6

200ms

2.4 sec

0x00

256

700ms

8.3 sec

Address

Bits

Description

PILTL

0x08

7:0

Proximity low threshold lower byte

PILTH

0x09

7:0

Proximity low threshold upper byte

PIHTL

0x0A

7:0

Proximity high threshold lower byte

PIHTL

0x0B

7:0

Proximity high threshold upper byte

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