TMD27253 datasheet(21/51 Pages) OSRAM

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[v2-00] 2023-Feb-22

TMD2725 − Register Description

AILTH Register (Address 0x85)

Figure 24:

AILTH Register

The photopic channel is compared against low-going 16-bit

threshold value set by AILTL and AILTH.

The contents of the AILTH and AILTL registers are combined and

treated as a sixteen bit threshold value. If the value generated

by the photopic channel is below the AILTL/H threshold and the

APERS value is reached, the AINT bit is asserted. If AIEN is set,

then the INT pin will also assert.

When setting the 16-bit ALS threshold AILTL must be written

first, immediately follow by AILTH. Internally, the lower 8-bits

are buffered until the upper 8-bits are written. As the upper

8-bits are written both the high and low bytes are

simultaneously latched as a 16-bit value.

AIHTL Register (Address 0x86)

Figure 25:

AIHTL Register

The photopic channel is compared against high-going 16-bit

threshold value set by AIHTL and AIHTH.

The contents of the AIHTH and AIHTL registers are combined

and treated as a sixteen bit threshold value. If the value

generated by the photopic channel is above the AIHTL/H

threshold and the APERS value is reached, the AINT bit is

asserted. If AIEN is set, then the INT pin will also assert. When

setting the 16-bit ALS threshold AIHTL must be written first,

immediately follow by AIHTH. Internally, the lower 8-bits are

buffered until the upper 8-bits are written. As the upper 8-bits

are written both the high and low bytes are simultaneously

latched as a 16-bit value.

Addr: 0x85

AILTH

Bit

Bit Name

Default

Access

Bit Description

7:0

AILTH

0x00

This register sets the high byte of the LOW ALS

threshold.

Addr: 0x86

AIHTL

Bit

Bit Name

Default

Access

Bit Description

7:0

AIHTL

0x00

This register sets the low byte of the HIGH ALS

threshold.

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