TMD49037 datasheet(54/86 Pages) OSRAM

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Datasheet, Public

Page 53

[v2-00] 2022-Nov-03

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TMD4903 − Register Description

Interrupt Enable Register (INTENAB 0xDD)

Figure 65:

Interrupt Enable Register

765432

ASIEN

PGSIEN

PIEN

AIEN

IIEN

Reserved

CIEN

Reserved

Field

Bits

Description

ASIEN

ALS Saturation Interrupt Enable. When asserted permits ALS

saturation interrupts to be generated. Bit is mirrored in the CFG1

PGSIEN

Proximity Saturation Interrupt Enable. When asserted permits

proximity saturation interrupts to be generated. Bit is mirrored in the

CFG1 register.

PIEN

Proximity Interrupt Enable. When asserted permits proximity

interrupts to be generated, subject to the proximity thresholds and

persistence filter. Bit is mirrored in the ENABLE register.

AIEN

ALS Interrupt Enable. When asserted permits ALS interrupts to be

generated, subject to the ALS thresholds and persistence filter. Bit is

mirrored in the ENABLE register.

IIEN

IRBeam Interrupt Enable. When asserted permits IRBeam interrupts to

be generated. Bit is mirrored in the ICONFIG register.

Reserved

Reserved. Bit must be set to 0.

CIEN

Calibration Interrupt Enable. When asserted permits calibration

interrupts to be generated.

Reserved

Reserved.

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