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TMG39921 数据表(PDF) 54 Page - OSRAM GmbH |
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TMG39921 数据表(HTML) 54 Page - OSRAM GmbH |
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54 / 96 page  ams Datasheet Page 53 [v1-06] 2018-Feb-27 Document Feedback TMG3992 − Register Description Configuration Register One (CONFIG1 0x8D) The CONFIG1 Register sets the wait long time. Figure 52: Configuration Register One Note(s): 1. Bit 6 is reserved, and is automatically set to 1 at POR. 2. Bit 5 is reserved, and is automatically set to 1 at POR. If this bit is not set, power consumption will increase during wait states. 765 432 1 0 Reserved WLONG Reserved Field Bits Description Reserved 7 Reserved. Bits must be set to 0. Reserved (1) 6 Reserved. Bit must be set to 1. Reserved (2) 5 Reserved. Bit must be set to 1. Reserved 4:2 Reserved. Bits must be set to 0. WLONG 1 Wait Long Enable. When asserted, the wait cycles are increased by a factor 12× from that programmed in the WTIME register. Reserved 0 Reserved. Bits must be set to 0. |
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