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33993 数据表(PDF) 2 Page - Freescale Semiconductor, Inc |
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33993 数据表(HTML) 2 Page - Freescale Semiconductor, Inc |
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2 / 28 page  Analog Integrated Circuit Device Data 2 Freescale Semiconductor 33993 INTERNAL BLOCK DIAGRAM INTERNAL BLOCK DIAGRAM Figure 2. 33993 Simplified Internal Block Diagram + – 5.0 V 125 k Ω VDD Analog Mux Output VPWR, VDD, 5.0 V POR Oscillator Clock Control Bandgap Sleep PWR 40 µA SPI Interface and Control WAKE Control INT Control Temperature Monitor and Control MUX Interface SP0 SP1 SG0 SP2 SP3 SP4 SP5 SP6 SP7 SG2 SG1 SG3 SG4 SG5 SG6 SG7 SG8 SG9 SG10 SG11 SG12 SG13 WAKE INT SCLK CS SO AMUX SI VDD VPWR GND VPWR 5.0 V VPWR 5.0 V 5.0 V VPWR VDD VDD and 5.0 V + – 4.0 V Comparator To VPWR SG0 SPI Ref 2.0 mA 16.0 mA VPWR 5.0 V 125 k Ω VDD 2.0 + – 4.0 V Comparator To VPWR SP7 SPI Ref mA 2.0 mA 16.0 mA 16.0 mA VPWR 2.0 + – 4.0 V Comparator To VPWR SP0 SPI Ref mA 2.0 mA 16.0 mA 16.0 mA VPWR + – 4.0 V Comparator To VPWR SG13 SPI Ref 2.0 mA 16.0 mA VPWR |
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